Wednesday, January 15, 2020

Float, HLSL & SPIR-V Compiler Role

Float, HLSL & SPIR-V Compiler Role
(c)RS


Vulkan 1,1.2,1.3+ & DX10,11,12+ , HLSL & SPIR-V
Rule sets : Float,Vector,AVX,SiMD

General Instruction Optimisation Procedure  & Vulkan/DX Shader stack.

HLSL & SPIR-V Compilers jobs are to streamline code into efficient Float & SiMD,Vector,AVX Instruction sets that do the maths in the order most efficient for clock cycle use & Instruction load,store & set cycles.

HLSL & SPIR-V should be optimisation compiler sub-rules for valid Vector,AVX,SiMD instructions.
Complex maths is 90% going to be float & SiMD instruction are clock cycle optimiser's for uncomplicated maths with multiple vectors.

General Instruction Optimisation Procedure  & Vulkan/DX Shader stack.

Firstly the SiMD Shader base language is Assembler with script balanced scripting models

GPU: AMD,NVidia,STI,ARM,Intel ,RISC sets(IBM,Cisco,Del,HP,Fujitsu,Sun,Subset Micro-Processors,Thunder 2,CISC: AMD,Intel, IBM
(Others Exist.)

Basic instruction strategy of SiMD & Float adaptation of the main concerns for all programming models that funnel into SiMD/AVX/Vector & broadly Float..

HLSL,SPIR-V Code is a layer 2 abstraction over the code base Vectored Instruction Set,
Conceptually the baggage is imagining that there is a limitation to level 3 C Code..
Well as SiMD/Vector/AVX/Float is a Algebra maths formula, The basic solution is algebra.

Algebra is the super set within which Shader code exists as a subset of Float,
Understanding this fact is key to understanding the concept.

The role of the shader layer shall be divided into two parts:
Complex maths : (Integer, Float) & Simple Maths with multiple dataset values.

Firstly the Coder separates the two layers that solve the maths algebra.
(FLOAT)The complex maths Objects(Algebra) & (Vector,AVX,SiMD)the Vector rule set Objects.

Examples:
Polygon (float) Values = Result A,B,C & then Vector to tessellation
Preferably we have the polygons worked out and saved in ram & then we tessellate.

Vector Instruction: Memory Loaded Objects (A,B,C,D,Ecetera)
Instruction sets of bit swaps being common in Interpolation & Anti Aliasing for example.

Vector instruction sets : AVX are in principle to redice CPU Cycle count on multiple Object(A,B,C,D) Simple Maths without testing the rule sets.

The world of Vector involves Bit Swaps (More complex algebra)
& Simple Mul (Multiply) + - & Division /

Bit swapping data sets appears to be a key player in SiMD/AVX
So arguing about Float matters.. and the role of Vector instruction is clearly defined as increasing instruction count per clock cycle for a limited instruction set.

Understanding efficiency is the object of the compiler & we have to test the instruction speed & efficiency versus FLOAT..

Bit Swaps are 3 Float instruction cycles for example versus 1 in AVX; With series of Objects to swap,
Series of 4 for example.

Float &Integer maths Instructions:

Dimensional code such as 3D Polygons,Curves,Ellipses,FTT,Blast & Maths related to vectored noise reduction such as Analogue Vacuum Tube Maths; Indeed Ohms law for example.

So imagine a world where simple algebra is the law, So algebra is soon complicated & involves 3 roll loops.

For example:

For A = 3, C = EMC², D = Entropy, E = Energy

therfor A + B

B = ( G = ( F - ((D/C)+(E*C))))

Exumé Temré
Vector is to simplify cycle, Float is to explain the butterfly

https://science.n-helix.com/2019/05/compiler-optimisation.html

https://www.khronos.org/blog/hlsl-first-class-vulkan-shading-language

(c)Rupert Summerskill

No comments: