Saturday, December 3, 2022

Precision Differential Rollover Math Error Solve - RS

Precision Differential Rollover Math Error Solve - (c)Rupert S

{Solve} : {{Maths Roll Error on 24Bit Audio versus 32Bit} ~= Stutter} : Windows 3D Audio, DTS & Dolby Atmos 2022-11-30 RS https://is.gd/LEDSource

Windows 3D Audio, DTS & Dolby Atmos 2022-11-30 RS https://is.gd/LEDSource

Solve Basic numeric math rollover errors on float and integer operation in applications; runtimes; applications & DLL & Processors : RS

*

{Solve} : {Maths Roll Error} : (c)RS
{Maths Roll Error on 24Bit Audio versus 32Bit} ~= Stutter

Additional roll, Error margin on 32Bit maths Float with 24Bit 5 point margin roundups,

A 32Bit float rolls up on a single operation 226526554817.{24Bit float + Error roundup} .9> .49 = .5+ = roll up..

R={5+ or 4- | 0.45+ or 0.44-} : or {0.445, |> 0.444444444445 |> 0.4 N4 +Decimal Places +5}

Clipping operation depth of float; Is 3 operations or 2 with Stop count = 1 to 24 bit places + 1 or 2 for error rolling, up or down.

Precision Clip
Math OP | Clip > Cache {Math OP <> Use}

Precision Counter
Math OP + Counter(internal to FPU:CPU | Stop > Cache {Math OP <> Use}

*

Windows 3D Audio, DTS & Dolby Atmos should do to at least 32Bit 384Khz 7.1 Channels,

There is absolutely no reason a 64Bit processor cannot do 64Bit audio,
Mind you 32Bit Integer is around 60% of total CPU Support with 64Bit divided by 2,

So 32Bit Audio is 100% speed conformant & there are few reasons to reduce it to 24Bit or 16Bit without processing benefaction; Such as Error management on 24Bit on 32Bit instruction:

Both AMD & Intel X64

Rupert S 2022-11-30

"State-of-the-art approaches such as OpenMP and OpenCL"
https://is.gd/LEDSource

FSR_FL RT: Proven

ML Training Telescope, Camera, Video & Image Display Enhancement, Produced 2 Hours ago! 2022-12-02 https://www.science.org/doi/pdf/10.1126/sciadv.add3433?download=true

https://is.gd/MLCodecShaping

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2021/09/temporal-aliasing-image-shaping-polygon.html

https://science.n-helix.com/2022/02/visual-acuity-of-eye-replacements.html

https://science.n-helix.com/2019/06/vulkan-stack.html

https://science.n-helix.com/2022/03/simd-render.html

https://science.n-helix.com/2022/09/ovccans.html

https://science.n-helix.com/2022/11/frame-expand-gen-3.html

https://science.n-helix.com/2022/10/ml.html

https://science.n-helix.com/2022/08/jit-dongle.html

https://science.n-helix.com/2022/06/jit-compiler.html

Sunday, November 20, 2022

The principle of the Bit'...' DAC (c)RS

The principle of the Bit'...' DAC (c)Rupert S


(yes since 1992)


To the world I presented the 1Bit DAC,

Principally it draws waves like a pencil by frequency; So 500Mhz DAC is great!

DAC 1Bit :

 . . .
. .. .. . .
 . ..

DAC 3Bit : Dithers/Interpolates the pattern with 3 Points per one & averaging

 . . .
. .. .. . .
 . ..

A Room Setup : 7.1 for example is 7, 1 Bit, 3Bit, 5Bit,More, DACs...

1 per Channel

We however place one more DAC between each channel to interpolate/Dither

3D Audio is up and down speaker DACs

ADC : Analog to digital conversion presents the analogue input into the matrix sum calculator, to collect the bits into groups along the lines of : 8Bits, 16Bits, 32Bits, 48Bits ....N-Bits

Right 1 Bit DAC works By two principles: (With Capacitor)

1:
Vinyl output is varying frequency of a continuous analogue nature & essentially replication of frequency variance, Suitable for a single line instrument of almost infinite frequency variance, defined by the Crystal output Hz multiplier..

2:
Vinyl output but we use a higher frequency than the output Hz & we interleave the frequency submission over multiple frequencies by a Hz factor : Base Hz = 48Kzh | DAC Frequency = 48Kzh * X | = Notes/Tones Per Hz

Interleaved frequency response.

We use capacitors to solve WATT related power drops from quiet instruments dominating another 1 Bit DAC on the same line.

SBC is our model; MPEG/Codec Banding:

52 Bands = 52 Pins | 52 Pins plus 10 band hopping double note 1Bit DAC = 64Bit,

64Bit 1Bit DAC Pins has all 52 Bands of SBC Covered in a pure note + 10 Band hoppers,

Alternatively 32Bands 1Bit DAC & 32Bit Hopper 1Bit DAC.

32Bit Hopper Analog 1Bit DAC = 32Notes continual (WOW)

Higher frequency DAC = Interleaved BIT, But it has to overlay every note but need less Bit.

Rupert S

Banding Monitor, TV & 3D technologies & Codecs: RS


The frequency response of the Video DAC is around 600Mhz.

The band estimate is in reference to various technologies & Codecs:

12Bands to 35Bands on SCART Cable with a 15Mhz to 100Mhz Clock,

20Bands to 60Bands VGA Port Digital

35 Bands to 250 Bands recommended VGA+ HDMI 1.4a to HDMI 2.1b

Each band consisting of blocks of data in : Data Width : 8Bit, 10Bit, 12Bit, 14Bit, 16Bit

This consists of a high colour & contrast; WCG & HDR Content.

Compression is advised.

Rupert S

*

https://science.n-helix.com/2021/11/expand-formula-sonarus.html

https://science.n-helix.com/2021/10/he-aacsbc-overlapping-wave-domains.html

https://science.n-helix.com/2022/11/variable-sensitivity-cable-technology.html

https://science.n-helix.com/2021/12/3d-audio-plugin.html

https://science.n-helix.com/2021/10/eccd-vr-3datmos-enhanced-codec.html

https://science.n-helix.com/2022/03/ice-ssrtp.html

https://science.n-helix.com/2021/09/temporal-aliasing-image-shaping-polygon.html

https://science.n-helix.com/2021/11/wave-focus-anc.html

https://science.n-helix.com/2021/10/noise-violation-technology-bluetooth.html

https://science.n-helix.com/2021/11/ihmtes.html

********

(My work does not guarantee your product is GPL you may share with me) "State-of-the-art approaches such as OpenMP and OpenCL" https://is.gd/LEDSource

LC3Plus Source for HDMI & DisplayPort Proposal https://is.gd/LC3PlusSource

https://www.etsi.org/deliver/etsi_ts/103600_103699/103634/01.03.01_60/ts_103634v010301p0.zip

https://www.etsi.org/deliver/etsi_ts/103600_103699/103634/01.03.01_60/ts_103634v010301p.pdf

Free to build!

You know you allow LC3Plus upto 500Kb/s? why not smash a load of
"terrible codecs" & make a upto 1Mb/s band or even better 1.3MB/s &
for DisplayPort & HDMI 7MB/s ...

Bound to be a few casualties to Van Brahms! Mastery!
& while you are at it, make 3D Audio specifications for Dolby & DTS Available!

Sure they would love it.

Be lovely!

https://www.iis.fraunhofer.de/en/pr/2022/20221011_lc3plus.html

https://www.iis.fraunhofer.de/en/ff/amm/communication/lc3.html

"State-of-the-art approaches such as OpenMP and OpenCL"
https://is.gd/LEDSource

Sunday, November 13, 2022

Variable Sensitivity Cable Technology

Variable Sensitivity Cable Technology (c)RS

USB & HDMI & DisplayPort & Cables Transmitting Data such as PCI & RAM,

High priority technology

(The actual cable can be any Voltage you need, higher V means faster transmitting & lots more errors) (c)Rupert S

Twisted pair cable sets for HDMI & DisplayPort & other cabling need a protocol that does more than Error correct from 2 to 5 tiny cables or twisted cables per pin! with error correction...

Can in base mode transmit more than one signal; By filtering data speeds.

Transmitting multiple wave lengths; Varying frequencies....

Each cable can have a wavelength polarity transmission using quartz timing crystals & transistor energizers (converting to the faster 5v, with a transistor & Crystal)

We can do the same for light port, Light port relies on higher frequency fiber optic cable connect..

The relative speed of a static pin in a PC is not too much of a problem, frequencies of static pins can be quite high; At least 500Mhz (Shielded),

Cables in motion however are the reason we need the cables to be as motionless as possible, So errors are static to Machine Learning & Error correction by statistical observation software & firmware.

We can however with a Twisting cable set & a single pin, Multiply the frequency transmission by using per cable selectivity with Quart's timing crystals, these do not need to be complex!

Allowing our cable PIN (DP,HDMI,USB Port for example(Static)) to multiply the frequency response by multiple cables per pin.

We can however; Multiply the error correction, By varying the output voltage along the side of the pin, By varying the resistance slightly with a 2 to 5 segment pin with tiny response differences regarding frequency or voltage.

We may indeed improve classic cable connects therefore by clearly defining each transmitted frequency...

Clearly separate..

But not a problem with compatibility.

We shall see!

Rupert Summerskill 2022-11-12

https://bit.ly/VESA_BT

https://science.n-helix.com/2022/02/visual-acuity-of-eye-replacements.html
https://science.n-helix.com/2022/03/fsr-focal-length.html
https://science.n-helix.com/2021/09/temporal-aliasing-image-shaping-polygon.html
https://science.n-helix.com/2022/03/simd-render.html

https://science.n-helix.com/2019/06/vulkan-stack.html

Sunday, November 6, 2022

Frame Expand GEN 3

Frame Expand GEN 3 - Pre Alpha Frame Prediction Motion Compensation Micro Flow Frame & Sharpen with Texture Preload & Removal (c)RS Development 2022


On the Subject for FSR3 & XeSS & ML & TV, Frame generation, Leveraging predict for video between 2 frames would work! H264, H265, VVC, AV1, VP9, DSC; Hardware Codecs all leverage predict!

Predict is an 8x8 Pattern & gets the basic ball rolling if you have 2 frames!

We can work on 3 : 5 : 8 frame predictions, Latency would be an issue! However by leveraging in what Quantum Computing calls : Undefined Future,

We prodigy based on texture locations in reference frame (Pre finalised) & the Defined first wave (output frame)

Frame reference Table for Predicted Interframe : { TV & GPU & Renderer }

{

Past Frame 3 }
Past Frame 2 }
Past Frame 1 } { Frame Series A }

{

Finalised previous frame with textures to clear,
Current to render Frame

}

Future frame series; Stable to probable : { 1 : 2 : 3 }

(c)Rupert S

******

C.P.C : Combined Prefetch & Cache : Frame Delta Predict Optimisation : RS


Prediction of frames between our stable frames makes a frame available that is based upon our knowledge of polygon & texture locations,

We do not have to base the prediction of video frame (DSC Codec example) upon simply motion,
We can also predict upon past frames to smooth output video frame rate/FPS,
For we almost always record video from the preceding frame.

We therefore can save 'Predict' for the video from our Past, Present & Future frames,
We create the Predict for the Frame & BFrame & Delta Frame with knowledge of future frames..

We have Future frames because we preload the planned Polygon & texture paths of the GPU Compute Units & Prefetch with Cache..

Combining both Prefetch (Cache) & Preframe generation optimisations & predictions.

We combine C.P.C with texture, animation & polygon load & unload with Predict for Video/DSC/Codec

We can also predict for frame based upon what we call textures & polygon's in a frame..
Because we regard the frames content as 3D or 2D saved into a frame or series of frames.

(c)Rupert S

******

Frame generation By shape & motion made simple: RS


A interframe with prediction (forward leaning) composes forward into the next frame...
B Frame (Quality prediction forward leaning) loaded wavelets to reuse

Vectors saved to frame (shows likely motion & audio sync)
Prediction Vectors & Systematic Stored Motion Vectors

This indicates which pixels will need to refresh and we can then start the data loading process & set refresh & leave a refresh pull to our display panel

Easing the burdens of frame generation & refresh: Table

(Audio & Video Sync properties & Prediction Vectors & Systematic Stored Motion Vectors)

Properties :

Predict motion,
Predict what moves (as in by colour & shape),
Predict 3D Motion in 2D with generalised reference material in 2D & 3D.

Prediction Vectors & Systematic Stored Motion Vectors

Colour properties:

Same colour + Predict Vector
Different colour : From source colour + Vector

Interframe generation (Requires 1 Frame latency, Save 2 frames & Predict 3rd),
Interframe generation latency reduction is to make frames faster (fps) initially & follow

Save while processing 2 frames a vector prediction for 1:2:3 Interframes,

Latency issues are covered by generating a faster initial frame rate for 3 seconds & following this though content.

(c)Rupert S

******

Video Codec Reference : https://science.n-helix.com/2022/09/ovccans.html

https://science.n-helix.com/2022/03/fsr-focal-length.html
https://science.n-helix.com/2021/09/temporal-aliasing-image-shaping-polygon.html
https://science.n-helix.com/2022/04/vecsr.html


Easy Install Codecs: https://is.gd/DilyWinCodec

Main interpolation references:

Interpolation Reference doc RS https://drive.google.com/file/d/1dn0mdYIHsbMsBaqVRIfFkZXJ4xcW_MOA/view?usp=sharing

ICC & FRC https://drive.google.com/file/d/1vKZ5Vvuyaty5XiDQvc6LeSq6n1O3xsDl/view?usp=sharing

FRC Calibration >
FRC_FCPrP(tm):RS (Reference)
https://drive.google.com/file/d/1hEU6D2nv03r3O_C-ZKR_kv6NBxcg1ddR/view?usp=sharing

FRC & AA & Super Sampling (Reference)
https://drive.google.com/file/d/1AMR0-ftMQIIC2ONnPc_gTLN31zy-YX4d/view?usp=sharing

Audio 3D Calibration
https://drive.google.com/file/d/1-wz4VFZGP5Z-1lG0bEe1G2MRTXYIecNh/view?usp=sharing

2: We use a reference pallet to get the best out of our LED; Such a reference pallet is:

Rec709 Profile in effect : use today! https://is.gd/ColourGrading

Rec709 <> Rec2020 ICC 4 Million Reference Colour Profile : https://drive.google.com/file/d/1sqTm9zuY89sp14Q36sTS2hySll40DilB/view?usp=sharing

For Broadcasting, TV, Monitor & Camera https://is.gd/ICC_Rec2020_709

ICC Colour Profiles for compatibility: https://drive.google.com/file/d/1sqTm9zuY89sp14Q36sTS2hySll40DilB/view?usp=sharing

https://is.gd/BTSource

Colour Profile Professionally

https://displayhdr.org/guide/
https://www.microsoft.com/store/apps/9NN1GPN70NF3

*Files*

This one will suite Dedicated ARM Machine in body armour 'mental state' ARM Router & TV https://drive.google.com/file/d/102pycYOFpkD1Vqj_N910vennxxIzFh_f/view?usp=sharing

Android & Linux ARM Processor configurations; routers & TV's upgrade files, Update & improve
https://drive.google.com/file/d/1JV7PaTPUmikzqgMIfNRXr4UkF2X9iZoq/

Providence: https://www.virustotal.com/gui/file/0c999ccda99be1c9535ad72c38dc1947d014966e699d7a259c67f4df56ec4b92/

https://www.virustotal.com/gui/file/ff97d7da6a89d39f7c6c3711e0271f282127c75174977439a33d44a03d4d6c8e/

Python Deep Learning: configurations

AndroLinuxML : https://drive.google.com/file/d/1N92h-nHnzO5Vfq1rcJhkF952aZ1PPZGB/view?usp=sharing

Linux : https://drive.google.com/file/d/1u64mj6vqWwq3hLfgt0rHis1Bvdx_o3vL/view?usp=sharing

Windows : https://drive.google.com/file/d/1dVJHPx9kdXxCg5272fPvnpgY8UtIq57p/view?usp=sharing

Wednesday, October 19, 2022

Machine Learning Equates Solve Table for Advanced ML

Machine Learning Equates Solve Table for Advanced ML (c)RS


Solve Table of Statistically provable Machine Equates & Solves : Table of function competitors & Operators.

"I know this is depressing from my end with a FX8320E with AVX but if you multi tune the CPU Kernel for the RX / RTX that 512DL AVX would have meaning, If you are kind you will allow machine learning on the AVX FX8320E Level to work on SiMD Yes / No comparisons !"

*

SiMD Performance : RS


Performance per WATT of MMX & MMX+ & SSE & AVX Machine Learning & Shader code; Is a matter of 8x8Bit & 16x16Bit Code on GPU

Our role is to reduce complex un-cache-able ML to Cache Enabled 64KB
Modelling of 1990's without Quality loss of 32Bit++ 64Bit+

8x8Bit sharpening MMX Becomes Dual Pipe (16x16bit)*2 in 32Bit Dual 16 Pipeline & Twice as sharp
Machine Learning method for MMX Is Fast & Cheap, MMX2 More Compatible,
Intrinsic improvements such as combined ops & DOT4 Further improve the performance of under 1MB Code..

Performance & Function per WATT, Is unbeaten; Let us prove it!

For example Quake has MMX Emulation & MMX Dithering code on 3D Textures,
In 8Bit 256 Colours dithering is noticeable; In 15Bit to 32Bit the small shade difference in dithering colour is subtle & flawless,
Improving light subtilty & Colour pallet WCG & HDR 10Bit to 16Bit per channel.
*

Solve Table of Statistically provable Machine Equates & Solves : Table of function competitors & Operators.


Runtime Library - Multiple Solve Table

I would like a Solve Table of Statistically provable Machine Equates & Solves that make the equivalent of Maths Compilers such as RUST & Fortran's

For example basic ML code test function loops are basically compatible with X-OR Comparators on AVX! Other functions such as greater or less than; Are AVX Compatible.

Machine Learning : List of actions that are SiMD Baseline: Statistical Observance and Solve Tables

Yes or no comparator X-OR
Memory array Byte Swap
Greater or less than with swap or with X-OR Roll
Memory save & store
Edge comparisons
Compares (Colour, Math, Equate, Target, Solve if)

There are more! Statistical Observance and Solve Tables.

Examples 2:

Shape compare is a matter of inner & outer Vector : Comparison & X-OR, Larger outside & X-OR The differentiation:
By Dot,
By Mass (non literal dot difference comparator by axis),
Actual Mass
Density : Lumina, Weight, Mole, Mass / Area

Edge Solve : X-OR ~= Colour, Lumina, Shade, Vibrancy, Distance, Matrix Solve 3D>=2D Flattened Comparator
If = X-OR=N<0.0001 Then Compare &= Mutex Solve / Average

Polygon Join/Merge Tessellation : If Model = Same (T1 + T2 If (T1 + T2)/2 = Difference Less Than 0.0001 | = Merge/Converge

*

We all think our own way; Potential is always there on a Runtime Library - Multiple Solve Table

Machine learning | Equate ~= Multi Layer Wavelet Abstraction
https://science.n-helix.com/2022/09/ovccans.html

https://www.youtube.com/watch?v=-9lCpfrOQQ4

(c)Rupert S 2022-10

https://is.gd/LEDSource
https://is.gd/BTSource

https://science.n-helix.com/2021/03/brain-bit-precision-int32-fp32-int16.html
https://science.n-helix.com/2022/08/jit-dongle.html
https://science.n-helix.com/2022/06/jit-compiler.html

https://is.gd/MLCodecShaping
*

This one will suite Dedicated ARM Machine in body armour 'mental state' ARM Router & TV
(ARM Learning 4K ROM; Safe Larger USB ROM) https://bit.ly/3Afn1Y4

https://drive.google.com/file/d/102pycYOFpkD1Vqj_N910vennxxIzFh_f/view?usp=sharing

Android & Linux ARM Processor configurations; routers & TV's upgrade files, Update & improve
https://drive.google.com/file/d/1JV7PaTPUmikzqgMIfNRXr4UkF2X9iZoq/

Providence: https://www.virustotal.com/gui/file/0c999ccda99be1c9535ad72c38dc1947d014966e699d7a259c67f4df56ec4b92/

https://www.virustotal.com/gui/file/ff97d7da6a89d39f7c6c3711e0271f282127c75174977439a33d44a03d4d6c8e/

Python Deep Learning: configurations

AndroLinuxML : https://drive.google.com/file/d/1N92h-nHnzO5Vfq1rcJhkF952aZ1PPZGB/view?usp=sharing

Linux : https://drive.google.com/file/d/1u64mj6vqWwq3hLfgt0rHis1Bvdx_o3vL/view?usp=sharing

Windows : https://drive.google.com/file/d/1dVJHPx9kdXxCg5272fPvnpgY8UtIq57p/view?usp=sharing

*

Machine learning | Equate ~= Multi Layer Wavelet Abstraction
https://science.n-helix.com/2022/09/ovccans.html

(documents) JIT & OpenCL & Codec : https://is.gd/DisplaySourceCode

Include vector today *important* RS https://vesa.org/vesa-display-compression-codecs/

https://science.n-helix.com/2022/08/jit-dongle.html

https://science.n-helix.com/2022/06/jit-compiler.html

https://science.n-helix.com/2022/04/vecsr.html

https://science.n-helix.com/2016/04/3d-desktop-virtualization.html

https://science.n-helix.com/2019/06/vulkan-stack.html

https://science.n-helix.com/2019/06/kernel.html

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2018/01/integer-floats-with-remainder-theory.html

https://science.n-helix.com/2022/08/simd.html

Eclectic & for the codecs of the world! OVCCANS (install and maintain as provided HPC Pack)

https://science.n-helix.com/2018/09/hpc-pack-install-guide.html

*****
Best NPM site on world https://npm.n-helix.com/bundles/

(Simple Install) Website Cache JS Updated 2021-11 (c)RS https://bit.ly/CacheJS
(Simple Install) Science & Research Node High Performance Computing
Linux & Android https://is.gd/LinuxHPCNode

Presenting JIT for hardware interoperability & function :
https://is.gd/DisplaySourceCode

https://is.gd/BTSource

(Simple Install) Website Server Cache JS Updated 2021-11 (c)RS
https://bit.ly/CacheJSm
(Simple Install) Website Server Cache JS Work Files Zip Updated
2021-11 (c)RS https://bit.ly/AppCacheJSZip
*****

Tuesday, October 4, 2022

Vibration Array Spectrometer : (c)RS

Vibration Array Spectrometer : (c)RS


Vibrating side to side & where necessary up and down & at angles to create a complete wavelength photo & data from events such as nuclear reactions..

The devices specific vibrational frequency can range into the thousands Hz & must slow down before vibrating back to assist delicate sensor material from cracking or fracturing during work cycles..

We can use compound to bounce absorbed energy back the other way; Such as silicone & rubber,
But they will be Soft & springy to reduce energy transfer of heat or radiation..

Must also be capable of resisting high & low temperature or environmental energies for long periods.

Super conducting surface vibration is capable of shifting a side strengthened cube at higher frequency with wave motions & sound also.

Interpolation of Spectrometer Data RS 2022


We can examine the light shift with our spectrometers & use interpolation arrays to make photos of it,

Thus we will be able to isolate the spectrometric data more precisely on our telescopes; When we use split colour wavelength spectrometry.

How do these Interpolation arrays work ?

We align the orbital position & azimuth & time with the specific wavelength in our Sapphire Crystal Grid Sensor spectrometer,

We do this with time so that we can align multiple orbit passes or vibrations of our sensor & create a sharp full spectrum image & data array!

We then can verify the exact spectrum of each star or subject; For example when using a spectrometer in CERN that vibrates at high frequency..

(c)Rupert S

*****

Interpolation in the age of Virtual Screen Resolution/Scaling : The process of evolutions in sharpness for over qualified displays(proud makers) (c)Rupert S


LED Pixel By Pixel exact full screen display of all resolutions with automatic compatibility for all input VESA Resolutions & Zero incompatibility with Any Resolution in the correct dimensions : RS https://is.gd/LEDSource

With PoCL & FSR intrinsic

It makes perfect sense that scaling frames is done though PoCL & FSR, Indeed both are required for CPU function!

Streaming services frame video & scale it & so do games, the scaling of inset video is a logical vector of FSR Scaling & colour correct display... HDR, SD, Rec709, Rec2020

Pure Tone Encoding/Decoding Codec

Applies to Displays & Camera/Recording Equipment; Codec: Decode & Encode,
Colours of composing display or recording elements; Red, Green, Blue, Grayscale Channel,
Pure tone Encoding & Decoding.

*

FRC is clever Dither : https://is.gd/BTSource https://is.gd/LEDSource

The main thing about Rec709 10Bit is that all 10Bit is in LED Standard spectrum, All 1.07B colours; Add FRC this is important!

Rec2020 is flexible upto 12/14Bit So 8Bit+2/4/6/8Bit FRC makes sense! & so does 10Bit + FRC

FRC Modes:

6Bit+FRC (for car & mobile tablet)

8Bit+FRC

10Bit+FRC

*

https://is.gd/ColourGrading

4 primary colour composure: RS

What does decomposing a frame into 4 colour groups mean?

Red, Green, Blue, Grayscale

Each pixel on a screen has 4 colour components & they are on a different place on the screen,
So when we sharpen; We sharpen to the closest pixel LED of the right colour,

Obtaining the best colour with the most logical of LED content,
the right colour sharpened for the right LED

Fist of all "We Have to decompose the image into primaries to compose the screen in it's highest colour value composite" Sharpening our composure to maximum colour correctness & sharpness Is only a:

*

Interpolation FRC Frame Compose:

CPU Estimate 300Mhz : 600Mhz : 900Mhz

2 step process,

Max 3 Processor Cycles:
Get/Fetch, Decompose, Blend & Sharpen,

Compose/FRC to pure Primaries Pixel & Interpolation
Max 5 Cycles

*

The creation of the frame requires so much data bandwidth, more pictures means more RAM...
Refinement means less error repair?

So what can we do ?

This is how interpolation works in principle:

We find the edges of a blurred image, now for our purposes we will Super Sample that image before saving it!

Therefore we have maneuvering room to upscale the actual screen & we can!

Using a simple principle of dividing the Image pixel count into its defining Red, Green, Blue & contrast shadow...

We have three planes of existence? no 4! Red, Green, Blue, Backlight or light shading!

With this we interpolate the nearest Pixel of the closest matching colour..

Not perfect; We still can lose contrast,
But we can take an upscaled image enhanced Alpha blend & get more from the actual display.

We can imagine the image being too red,green,blue, too contrasted?

But no, The project is to bring real extra resolution to the screen; By dividing our Red,Green,Blue,Black & White pixels into individually sharpened & together blended master piece,

One picture; 4 parts; One Whole piece

4 primary colour composure: RS

What does decomposing a frame into 4 colour groups mean?

Red, Green, Blue, Grayscale

Each pixel on a screen has 4 colour components & they are on a different place on the screen,
So when we sharpen; We sharpen to the closest pixel LED of the right colour,
Obtaining the best colour with the most logical of LED content,
the right colour sharpened for the right LED

Divided we FALL, Together we stand tall, The important bit is to catch the pieces that start to fall & rebuild tall!

Rupert S

If you design and create LED Monitors & TV's & want 165Hz refresh rate you often have sRGB, OLED Monitors are over 2x the price! So you need LED,

But how do we get the best out of LED?

Two ways: to be clear we use both methods at the same time!

1: We use FRC to increase colour references within our pallet ...
2: We sharpen & smooth unique content!

*

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2021/09/temporal-aliasing-image-shaping-polygon.html

https://science.n-helix.com/2022/04/vecsr.html

https://science.n-helix.com/2022/08/simd.html

https://science.n-helix.com/2022/08/jit-dongle.html

https://science.n-helix.com/2022/06/jit-compiler.html

Reference source https://is.gd/LEDSource

Main interpolation references:

This doc https://drive.google.com/file/d/1dn0mdYIHsbMsBaqVRIfFkZXJ4xcW_MOA/view?usp=sharing

ICC & FRC https://drive.google.com/file/d/1vKZ5Vvuyaty5XiDQvc6LeSq6n1O3xsDl/view?usp=sharing

FRC Calibration >

FRC_FCPrP(tm):RS (Reference)

https://drive.google.com/file/d/1hEU6D2nv03r3O_C-ZKR_kv6NBxcg1ddR/view?usp=sharing

FRC & AA & Super Sampling (Reference)
https://drive.google.com/file/d/1AMR0-ftMQIIC2ONnPc_gTLN31zy-YX4d/view?usp=sharing

Audio 3D Calibration
https://drive.google.com/file/d/1-wz4VFZGP5Z-1lG0bEe1G2MRTXYIecNh/view?usp=sharing

2: We use a reference pallet to get the best out of our LED; Such a reference pallet is:

Rec709 Profile in effect : use today! https://is.gd/ColourGrading

Rec709 <> Rec2020 ICC 4 Million Reference Colour Profile : https://drive.google.com/file/d/1sqTm9zuY89sp14Q36sTS2hySll40DilB/view?usp=sharing

For Broadcasting, TV, Monitor & Camera https://is.gd/ICC_Rec2020_709

ICC Colour Profiles for compatibility: https://drive.google.com/file/d/1sqTm9zuY89sp14Q36sTS2hySll40DilB/view?usp=sharing

https://is.gd/BTSource

Colour Profile Professionally
https://displayhdr.org/guide/
https://www.microsoft.com/store/apps/9NN1GPN70NF3

*Files*

This one will suite Dedicated ARM Machine in body armour 'mental state' ARM Router & TV https://drive.google.com/file/d/102pycYOFpkD1Vqj_N910vennxxIzFh_f/view?usp=sharing

Android & Linux ARM Processor configurations; routers & TV's upgrade files, Update & improve
https://drive.google.com/file/d/1JV7PaTPUmikzqgMIfNRXr4UkF2X9iZoq/

Providence: https://www.virustotal.com/gui/file/0c999ccda99be1c9535ad72c38dc1947d014966e699d7a259c67f4df56ec4b92/

https://www.virustotal.com/gui/file/ff97d7da6a89d39f7c6c3711e0271f282127c75174977439a33d44a03d4d6c8e/

Python Deep Learning: configurations

AndroLinuxML : https://drive.google.com/file/d/1N92h-nHnzO5Vfq1rcJhkF952aZ1PPZGB/view?usp=sharing

Linux : https://drive.google.com/file/d/1u64mj6vqWwq3hLfgt0rHis1Bvdx_o3vL/view?usp=sharing

Windows : https://drive.google.com/file/d/1dVJHPx9kdXxCg5272fPvnpgY8UtIq57p/view?usp=sharing

Thursday, September 29, 2022

Audio presentation & play

"I made a codec but I am not sure how to improve it! probably interpolation"

Audio presentation & play (c)Rupert S

Available for Bluetooth, VESA, HDMI & DisplayPort & Hardware such as GPU, CPU & Equipment.

Well the thing is that Wavelets (Dynamic mathematical NDimension Nd Shape objects),
& Also PCM is Pictorial 2D & 3D shape in forms such as BitMap.

To explain bitmap; This is a picture; Now with a picture we can present an enhanced version using bilinear interpolation & Trilinear Interpolation...

PCM is a BitMap or JPG or WebP Wavelet 2D drawing of a graph that translates into Audio by copying the frequency & volume.

So basically any operation used on Audio can be used on visual elements; Including wave filters & resonators or WaWa Bars,

Digital Audio presented as BITMAP presents an ideal situation where we can enhance it with Graphical effects such as sharpening & shaping or smoothing..

We can also present the Audio in 3D through a non literal presentation of 3D through Colour or shade on the drawing; or present that audio in a parallel bars or side by side presentation..

The Sound Colour Table : RS

We can use colour to present precision, Warmth & vibrational intensity & amplitude..
We can use cross shading to present repetition, Translation & transition..
We can present so many ways, But more importantly we can compress colour in ways like wavelet
We can Present 3D & Virtual Surround through Colour

We can also present the Audio as WebP or Textures including our compressed forms; However we have to reduce our compression so that no artifacting occurs.

New Audio Formats:

Wavelet Bitmap
Texture formats such as STC, ATC, HDR, Deep Colour
Texture formats such as Drill & SLLRL, ASTC, EAC, DXT, PVRTC & DSC
https://is.gd/Dot5CodecGPU , https://is.gd/CodecDolby , https://is.gd/CodecHDR_WCG , https://is.gd/HPDigitalWavelet

32Bit Float
24Bit Float
16Bit Float

We can potentiate the floating point by using it to present 3D Audio virtualisation or to improve audio precision.

Rupert S

*

XeSS Is here and is great! #Exclusive

https://www.youtube.com/watch?v=uMqKFgJcr-U

Lets use both XeSS & FSR to do Audio Sampling in 3D Wavelet (audio PCM
is just a BMP Saved!
We can do much more & compress more & still have better quality!

*****

Compression formats:

https://science.n-helix.com/2022/09/ovccans.html

Data Saving by inexact replication & Double layer wavelet shaping which are both one believes compatible with analog output & also with adjustment repeat play.

Compression matrix
https://drive.google.com/file/d/1xQ0t7LEYltQ8TR3MDsV4IHE8wrfsfWV0/view?usp=sharing

SLLRunLength : Compressed Pixel
https://drive.google.com/file/d/148-BpVSfT6bA5nPjKoiZ41vwuI9n7P_f/view?usp=sharing

Drill texture & image format (with contrast & depth enhancement)

https://drive.google.com/file/d/1G71Vd9d3wimVi8OkSk7Jkt6NtPB64PCG/view?usp=sharing
https://drive.google.com/file/d/1u2Qa7OVbSKIpwn24I7YDbwp2xdbjIOEo/view?usp=sharing


https://is.gd/BTSource

https://is.gd/LEDSource

Monday, September 12, 2022

OVCC_ANS : Optimised Vector component Compression with Alpha Numeric Sequencing & Compression

OVCC_ANS : Optimised Vector component Compression with Alpha Numeric Sequencing & Compression (c)Rupert S

*
Suitable for codec, Texture, Video Element, Firmware & ROM, Executable, Storage & RAM, DLL & Library runtimes, CSS & JS & HDMI & DisplayPort VESA Specifications : 
https://science.n-helix.com/2022/09/ovccans.html
https://science.n-helix.com/2022/11/frame-expand-gen-3.html

Eclectic & for the codecs of the world! OVCCANS (install and maintain as provided HPC Pack)
https://science.n-helix.com/2018/09/hpc-pack-install-guide.html
*

OVCC_ANS : RS


Suitable for codec, Texture, Video Element, Firmware & ROM, Executable, Storage & RAM, DLL & Library runtimes, CSS & JS & HDMI & DisplayPort VESA Specifications

Storage Problems EEPROM : Small powerful packed firmware for Devices, Routers, TV's Cameras & Computers

*
Devices, Drivers, VESA DSC & Active display drivers
PoCL & CL Kernels are used for the codecs & shading; Simply from the point of view multithreading SysCL & OpenCL are most effective at headless worker kernels; Frame buffer not required.

https://science.n-helix.com/2022/08/jit-dongle.html
https://science.n-helix.com/2022/06/jit-compiler.html

Cache Cyclic load segment Code Replication is quite a bit more efficient from the Shader, OpenCL, SiMD & Float expression point of view.

With code replication you do not necessarily have to depack the RAM to run the code; But that is a question of Jumps or Cache Cycles!

Similar to vector render on the optimised Vector component input compression is a layer of compression that renders fine lines, Curves & circles & points & basic gradients,

*

Principle of the Repeater with Co-modifier Gradient Wavelet & Numbers: RS


The primary principle to remember is that a gradient wavelet is in effect (in music terms):

A Sustain (Echo note)
A Pause (A silence (Space is taken in a file for this)

A Register Shaped Sustain (Where we move up the scale or down the scale or in a curve; With the same resonance sample, Example Trumpet or Piano or Harp)

A Repeater note : Exact repeat, Varied over time repeat, Quieter or louder, Modified by a coefficient.

So principle is : Copy Note sound & Modify over time, Repeat over time, Repeat & modify over time.

Also repeating for lines in an Image & hence video.


For example Bumps on a door or the texture of paint,
Light & shadow over the same texture; How complex this is depends on required quality!

Image, Number Or Audio sample: Data Complexity & How many SiMD Computation Cycles are required..
The more repeats or how large; Varies the processing workload.

Example: Hello World

Hello World Sample : [HWS] , Silent Echo Sample : [SES]

#PrintF Hello World

[SES], [HWS], [SES]x2, [HWS]x2(louder), [SES](Quieter), [HWS]x4(Louder to quieter),
[SES]x4 (Quieter to much quieter), [HWS]x4(quieter to Louder), [SES]x2(louder to quiet), [HWS]x4(Louder to quieter),

*

Wavelet Float forms


Wavelet bF16, F16 are quite useful for MP4 Standard compression
Wavelet bF32, F32 are quite useful for MP4 Enhanced Precision compression
Speed = bF16 (with advantages of long chain integer & small exponent)
For AVX F32 up to F64 are variously advantaged in multithreading,
Exceptionally bF16 & F16 NANO SiMD
*

OVCC is used to apply layers of vector graphic elements with optimised wavelets..
In principle the file is saved like so:

OVCC Layers

V = Vector
W = Wavelet
Gv = Gradient vector
Ns = Numeric Sequence
As = Alphabet Sequence
Ans = Alpha Numeric Sequence

{Load Binary or code: DLL,Exe, Library, WebJS for example}: {Firmware, Separate or joined}
{ Header }
{ Value storage for replication }
{ Gv:1>n, W:1>n, V:1>n }
{ Cans:1>n, Ns:1>n, As:1>n, Ans:1>n }

Vector Storage

[Gv];[Gv];[Gv]
[V];[V];[V];[V]
[W];[W];[W];[W]
[V];[Gv];[V];[Gv]
[W];[W];[V];[Gv];[W];[W];[V];[Gv]

Sequence Storage

[Ans];[Ans];[Ans]
[Ns];[Ns];[Ns];[Ns]
[As];[As];[As];[As]
[Ns];[Ans];[Ns];[Ans]
[As];[As];[Ns];[Ans];[As];[As];[Ns];[Ans]

Code Sequence Storage

[Loader]
[Cans];[Cans];[Cans]
[Ans];[Ans];[Ans]
[Ns];[Ns];[Ns];[Ns]
[As];[As];[As];[As]
[Ns];[Ans];[Ns];[Ans]
[As];[As];[Ns];[Ans];[As];[As];[Ns];[Ans]

You can use vector compression on plane transparency & Greyscale adding a lot to sharpness if optimised.

*
You see at the worst Drivers are compiled with last stage DSC Compression as Pixel shaders or compute shaders,

Thus avoiding bad bios DSC VESA But you can use OpenCL & directly render the frame as smoothing is not particularly required!

Even though before DSC a Smooth Wavelet is a big advantage to compression ratio & sharpness

But OpenCL Can smooth & sharpen with AA & SS Implemented.

Could We make all codecs compress & decompress ? We can!
I might have an MP4 DVD & also HPC requires WebP compression feature
& also HDR formats like JPGXL & JPG2000 & WebP & H264 & H265 & VP9 & AV1 on systems,
Like the RX570 & ARM, CPU & GPU; With OpenCL Support in all programs & for the operating system

OpenCL Hardware Compression is possible for all encoding formats & textures

VP9, AV1, Media compression acceleration!
But what to use based on de/compression performance?
VP9/H265 Currently Hardware Accelerated 90% of the time.
*

DSC/AV1/VP9/MPEG/H265/H264 Block Size Streamlining (c)RS

Code/JS/OpenCL/Machine Learning Processing Block Size Streamlining (c)RS


Dataset AV1/VP9/MPEG/H265/H264 : case example
My personal observation is that decompression & compression performance relates to block size & cache

SiMD 8xBlock x 8xBlock Cube : 32Bit | x 4 128Bit | x 8 256Bit | x 16 512Bit
Cache Size : 32Kb Code : Code has to be smaller inline than 32Kb! Can loop 4Kb x 14-1 for main code segment


Cache Size 64Kb Data : Read blocks & predicts need to streamline into 64Kb blocks in total,
4Kb Optimized Code Cache
4Kb Predict (across block for L2 Multidirectional)
16Bit Colour Compressed block 4x16Bit (work cache compressed : 54Kb
Lab Colour ICC L2 & block flow L2

*
The advice i give is given with honour & is stated true, We all need a good VP9 & AV1 & Media Codecs!
The advice, is to refresh the stream & restart the browser; You can see the world better with #True-Sourcery

Get rid of 90% of your intel & other device Codec Glitches and errors..
Compile right!
*

*****

2 layer/Plane Codecs: RS

Texture Compression & video Compression for quality 12Bit & 16Bit HDR & WCG,

Can also be used in displays for tiling & animation of screen array with multiple frames single post,
Cache & post commands; Single DIMM Post with multiple frames for lower Processor Cycle costs..
Screen brightness & colour control per tile; Single line post or Screen Post Cube Suggested.

In applications 2 layer/Plane texture can post to GPU & animate multiple frames with overlay texture or animation.

In video codecs can animate frame on base layer (background for example)

2 Planes / 2 Layer : Monitor, TV & Codec to screen cycle (advantageous to GPU & ARM Configured units & displays)

Animated or Image or 2 plane static + Animation frame (BumpMapping)
More than 2 Layers is possible but 16Bit & 32Bit SiMD & ALU suggest a range:

*
16Bit Effective ++ List : 2 Layer : ETC, ASTC Etcetera : Compatible Compression

10Bit + 4Bit + Modifiers
12Bit + 4Bit
10Bit + 6Bit

8Bit + 6Bit  + Modifiers
8Bit + 4Bit  + Modifiers
8Bit + 8Bit
8Bit + 4Bit
*

Basic 2 layer involves using another Plane/Layer as a mask,

Primary layer is 8Bit, 12Bit, 16Bit <> NBit Texture; Secondary layer is a mask:

Mask Methods:

1 Layer Texture : Can be animated but second layer will be Sync Timed.

2a layer is darker / lighter Image, Grayscale : HDR + small varieties in shade = WCG
2b layer is darker / lighter Image, Colour, Additive to Colour range + Light/Dark : WCG & HDR
2c Layer subtracts or Adds , Multiplies / Divides : Basic maths operations : Work = Depth

https://is.gd/BTSource

https://is.gd/Dot5CodecGPU
https://is.gd/CodecDolby
https://is.gd/CodecHDR_WCG &
https://is.gd/HPDigitalWavelet

DSC, ETC, ASTC & DTX Compression for display frames

These are the main XRGB : RGBA Reference for X,X,X,X
https://drive.google.com/file/d/1AMR0-ftMQIIC2ONnPc_gTLN31zy-YX4d/view?usp=sharing
https://drive.google.com/file/d/12vbEy_1e7UCB8nvN3hYg6Ama7HIXnjrF/view?usp=sharing

(c)RS

*****

*

{Solve} : {Maths Roll Error}

{Maths Roll Error on 24Bit Audio versus 32Bit} ~= Stutter

Additional roll, Error margin on 32Bit maths Float with 24Bit 5 point margin roundups,
A 32Bit float rolls up on a single operation 226526554817.{24Bit float + Error roundup} .9> .49 = .5+ = roll up..

R={5+ or 4- | 0.45+ or 0.44-} : or {0.445, |> 0.444444444445 |> 0.4 N4 +Decimal Places +5}

Clipping operation depth of float; Is 3 operations or 2 with Stop count = 1 to 24 bit places + 1 or 2 for error rolling, up or down.

Precision Clip
Math OP | Clip > Cache {Math OP <> Use}

Precision Counter
Math OP + Counter(internal to FPU:CPU | Stop > Cache {Math OP <> Use}
*

SiMD Performance : RS


Performance per WATT of MMX & MMX+ & SSE & AVX Machine Learning & Shader code; Is a matter of 8x8Bit & 16x16Bit Code on GPU

Our role is to reduce complex un-cache-able ML to Cache Enabled 64KB
Modelling of 1990's without Quality loss of 32Bit++ 64Bit+

8x8Bit sharpening MMX Becomes Dual Pipe (16x16bit)*2 in 32Bit Dual 16 Pipeline & Twice as sharp
Machine Learning method for MMX Is Fast & Cheap, MMX2 More Compatible,
Intrinsic improvements such as combined ops & DOT4 Further improve the performance of under 1MB Code..

Performance & Function per WATT, Is unbeaten; Let us prove it!

For example Quake has MMX Emulation & MMX Dithering code on 3D Textures,
In 8Bit 256 Colours dithering is noticeable; In 15Bit to 32Bit the small shade difference in dithering colour is subtle & flawless,
Improving light subtilty & Colour pallet WCG & HDR 10Bit to 16Bit per channel.

https://is.gd/LEDSource
https://is.gd/MLCodecShaping
*

Drill texture & image format (with contrast & depth enhancement)


https://drive.google.com/file/d/1G71Vd9d3wimVi8OkSk7Jkt6NtPB64PCG/view?usp=sharing

https://drive.google.com/file/d/1u2Qa7OVbSKIpwn24I7YDbwp2xdbjIOEo/view?usp=sharing

Scanline Coder Compression
https://drive.google.com/file/d/148-BpVSfT6bA5nPjKoiZ41vwuI9n7P_f/view?usp=sharing

WebP
https://github.com/webmproject/libwebp
https://github.com/webmproject/libwebp/blob/main/ChangeLog

AV1
https://github.com/AOMediaCodec

HEIF:HEVC
High Efficiency Image Format (HEIF) is being introduced : 10Bit>16Bit HDR
High Efficiency Video Codec (HEVC)-encoded storage system for intra-images and HEVC-encoded video image sequences in which inter-prediction is applied; Also for still images compressed with the HEVC (H.265) codec.
https://www.photoreview.com.au/tips/shooting/heif-what-you-need-to-know/
https://www.howtogeek.com/345314/what-is-the-heif-or-heic-image-format/

File Compression Logic
https://is.gd/BitStreamSpec
https://is.gd/IFFByteOrder

VVC
https://github.com/fraunhoferhhi/vvenc
https://github.com/fraunhoferhhi/vvdec

https://gitlab.com/AOMediaCodec/SVT-AV1/-/blob/master/Docs/CommonQuestions.md#improving-decoding-performance

Reference : "Patent license terms" https://en.wikipedia.org/wiki/High_Efficiency_Video_Coding#2022

Codec Parallelism - Dataflow model PREESM, OpenMP and OpenCL
OpenVVC & OpenHEVC Decoder Parameterized and Interfaced Synchronous DataFlow Tile Based Parallelism (PiSDF)
Create the dataflow model is called PREESM. This tool allows the automatic scheduling of tasks according to the number of used cores and the automatic generation of multicore algorithms.
https://link.springer.com/content/pdf/10.1007/s11265-022-01819-7.pdf

"State-of-the-art approaches such as OpenMP and OpenCL"
https://is.gd/BTSource

https://is.gd/LEDSource

(documents) JIT & OpenCL & Codec : https://is.gd/DisplaySourceCode

Include vector today *important* RS https://vesa.org/vesa-display-compression-codecs/

https://science.n-helix.com/2022/08/jit-dongle.html

https://science.n-helix.com/2022/06/jit-compiler.html

https://science.n-helix.com/2022/04/vecsr.html

https://science.n-helix.com/2016/04/3d-desktop-virtualization.html

https://science.n-helix.com/2019/06/vulkan-stack.html

https://science.n-helix.com/2019/06/kernel.html

https://science.n-helix.com/2022/11/frame-expand-gen-3.html

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2018/01/integer-floats-with-remainder-theory.html

https://science.n-helix.com/2022/08/simd.html

Eclectic & for the codecs of the world! OVCCANS (install and maintain as provided HPC Pack)

https://science.n-helix.com/2018/09/hpc-pack-install-guide.html

https://science.n-helix.com/2022/09/ovccans.html

Suitable for codec, Texture, Video Element, CSS & JS & HDMI & DisplayPort VESA Specifications : https://science.n-helix.com/2022/09/ovccans.html

https://www.gyan.dev/ffmpeg/builds/
https://github.com/GyanD/codexffmpeg/releases/tag/tools-2022-01-01-git-d6b2357edd
https://github.com/GyanD/codexffmpeg/releases/tag/5.1.1
https://www.gyan.dev/ffmpeg/builds/ffmpeg-tools.zip
https://github.com/GyanD/codexffmpeg/releases/download/5.1.1/ffmpeg-5.1.1-full_build.zip

https://ffmpeg.org/download.html
https://ffmpeg.org/releases/ffmpeg-snapshot.tar.bz2

Full H265, H264 & AV1 Support https://drive.google.com/file/d/1Xka_QSRmVBCqnyCZwrA_yjnqwSl4g0ml/view?usp=sharing

VP9, AV1, Media compression acceleration!
But what to use based on de/compression performance?
VP9/H265 Currently Hardware Accelerated 90% of the time

Get rid of 90% of your intel & other device Codec Glitches and errors..
Compile right!

Easy Install Codecs : https://is.gd/DilyWinCodec

The advice i give is given with honour & is stated true, We all need a good VP9 & AV1 & Media Codecs!
The advice, is to refresh the stream & restart the browser; You can see the world better with #True-Sourcery

*
'Study Observation' YouTube switches from pushing AV1 by majority to
VP9 & H265 which encodes slightly less, I mean slightly because my own tests
indicate a 300MB/h HD.. So VP9 & H265 Rock with E-AC3 & E-AC4 5.1:

The majority of GPU acceleration of VP9 & H265 & H264 is a good
reason! So let us clarify H264, H265 & VP9 Will become better with
this document. Rupert S

To clarify major improvement to H264, H265 & VP9 are clearly required for class leader,
There may be some doubt as to H264 but not of H265 & VP9!,

However this is 'In 'Statute'' fundamental versioning..

Allowing GPU to continuance to provide a quality of service of exceptional quality for the available price!
Our continued support of the aged & the mentally fit & the able; Of this world & of our society.

OpenCL Compatibility is making these codecs faster: For the highly expectant x64 FFmpeg crew, 
A Most compatible; Easy Install Codecs: https://is.gd/FFmpegWinCodec

Easy Install Codecs: https://is.gd/DilyWinCodec
Easy Install Codecs 4 ARM: https://is.gd/DilyWinARMCodec


OpenCL & other Hardware Acceleration : FFMPEG
https://ffmpeg.org/ffmpeg-all.html
https://ffmpeg.org/documentation.html

https://ffmpeg.org/download.html
https://ffmpeg.org/releases/ffmpeg-snapshot.tar.bz2
https://github.com/FFmpeg/FFmpeg
https://github.com/FFmpeg/FFmpeg/releases/tag/n3.0

HQImage
https://apps.microsoft.com/store/detail/webp-image-extensions/9PG2DK419DRG
https://www.microsoft.com/en-us/p/heif-image-extensions/9pmmsr1cgpwg
https://www.microsoft.com/en-us/p/hdr-wcg-image-viewer/9pgn3nwpbwl9
https://www.microsoft.com/en-us/p/raw-image-extension/9nctdw2w1bh8

HQVideo
https://www.microsoft.com/en-us/store/p/web/9n5tdp8vcmhs
https://www.microsoft.com/en-us/p/mpeg-2-video-extension/9n95q1zzpmh4
https://www.microsoft.com/en-us/p/av1-video-extension/9mvzqvxjbq9v
https://www.microsoft.com/en-us/p/vp9-video-extensions/9n4d0msmp0pt
https://www.microsoft.com/en-us/p/hevc-video-extensions/9nmzlz57r3t7

*****

https://www.phoronix.com/news/Rust-UEFI-Firmware-Hope-Tier-2

https://rust-lang.github.io/compiler-team/

https://dvdhrm.github.io/2022/09/07/towards-stable-rust-uefi/

https://doc.rust-lang.org/nightly/rustc/platform-support/unknown-uefi.html

https://github.com/rust-lang/compiler-team/issues/555

Yes Firmware Codec Development is the Dinosaur!
DOLBY ATMOS 7.1.2 "Dinosaurs in Atmos"- OFFICIAL THEATER DOLBY VISION [4KHDR]
https://www.youtube.com/watch?v=0EKBYVUj4w0

Monday, August 29, 2022

JIT Compiler Dongle - The Connection HPC 2022 RS

JIT Compiler Dongle - The Connection HPC 2022 RS (c)Rupert S


JIT Compiler Dongle makes 100% Sense & since it has no problem acting like a printer! It can in fact interface with all printers & offload Tasks,

However in High Performance Computing mode of operation the USB Dongle acts as the central processor from the device side; That is to say the device such as the printer or the Display...

You can supply a full workload to the dongle & of course it will complete the task with no necessity of assistance from the computer or the device.

The JIT Compiler comes into its own one two fronts:

Compatibility between processor types.

Aiding a device in processing &or passing work to that device to run; Work that is shared & if required workloads are passed back & forth & shared,

Shared & optimised...

The final results for example are post-scripts? no problem!
The final results for example are Directly Compute Optimised Printer Jet algorithms? no problem!
The task needs to compute specifics for a DisplayPort LED Layout ? no problem!

The device is powerful so share, JIT Compiler for real offloading & task management & runtime.

Functional Processing Dongle Classification USB3.1+ & HDMI & DisplayPort (c)RS

Theory 1 Printer

Itinerary:

Printers of a good design but low manufacturing cost of ICB printed circuits have a printhead controller,

But no Postscript Processor; But they do have a print dither controller & programmable version need to interface with the CPU on the printing device,

Print controlling is a viable Dongle & also Cache but workload cache has to have a reason!

That reason here given is the JIT Dongle that is able to interface with both Web print protocol & IDF Printing firmware.

But here we have postscript input into the JIT Compiles Kernel & output in terms of Jet Vectors & line by line Bitmap HDR & head motion calculations,

We can also tick the box on Postscript offloading on functioning PostScript printers; But we prefer to offload JIT for speed & size..

Vectors & curves & lines & Cache.

Theory 2 Screen

Itinerary as of printers but also VESA & line by line screen print & VESA Vectors & DisplayPort Active displays,

Cable Active displays require the GPU to draw the screen & calculate the Line Draw!

The Dongle activates like a screen with processor & carries the screen processing out; Instead of a smartwatch or small phone that does not have a good capacity for computer lead active display enhancements.

Theory 3 Hard Drives & controller such as network cards & plugs for PCI

Adapting to Caching & processing Storage or network data throughput commands, While at the same time being functionally responsive to system command & update makes JIT Dongle stand out at the head of both speed & function...

Network cards can send offloading tasks to the PCI socket & the plug will process them.

Hard-drives can request processing & it shall be done.

Motherboard ROMs & hardware can request IO & DMA Translation & all code install is done by the OS & Bios/Firmware.

Offloading can happen from socket to Motherboard & USB Socket & URT..

All is done & adapts to Job & function in host.

The 8M Motherboard & OS verifies the dongle, licences the dongle from the user..
& runs commands! Any Chipset, Any maker & every dongle by Firmware/Bios
What the unit constitutes is a functional Task offloader for OS & Bios/Firmware.

The utility is eternal & the functions creative & secure & licensed/Certificate verified.

Any Motherboard can be improved with the right Firmware & Plugin /+ device.

(c)RS

*****

Example Display Chain (Can be USB/Device Also For the OpenCL Runtime; To Run or be RUN) (c)RS


How a monitor ends up with an OpenCL : CPU/GPU Run Time Process: Interpolation & Screen enhancement: The process path

Firstly we need to access the GPU & CPU OpenCL Runtime such as:

Components that we need:

https://science.n-helix.com/2022/08/jit-dongle.html

https://science.n-helix.com/2022/06/jit-compiler.html

https://science.n-helix.com/2022/10/ml.html

Firstly, we need an OpenCL Kernel : PocCL :

PoCL Source & Code
https://is.gd/LEDSource

MS-OpenCL
https://is.gd/MS_OpenCL

Crucial components:

Microsoft OpenCL APP
Microsoft basic display driver OpenCL component (CPU)

CPU/GPU OpenCL Driver
PoCL Compiled runtime to run Kernels https://is.gd/LEDSource

We need an Ethernet connection to the GPU (Direct though the HDMI, DisplayPort),
A direct connection means no PCI Bus or OS Component needed,
(But indirect GPU Loaded OpenCL Kernel loading may be required)

Or

We need an Ethernet connection to the PC or computer or console!
Then we need a Driver (this can be integral or Drive) to load the OpenCL Kernel; This can have 3 parts in the main to run it!

Microsoft OpenCL APP
Microsoft basic display driver OpenCL component (CPU)

CPU/GPU OpenCL Driver
PoCL Compiled runtime to run Kernels https://is.gd/LEDSource

The compiled Kernel itself & this can be JIT : Just In Time Compile Runtime

Rupert S

*****

The DPIC Protocol in use for display, robotic hardware (arms for example) & Doctor Equipment arms & surgeries, Website loading or games.


In context of load for DPIC, We simply need a page (non-displaying Or Displaying (for example Monitor Preferences)) Inside the GPU..

Can use WebJS, WebASM : WASM, OpenCL : WebGPU : WebCL : WebGPU-ComputeShaders...

RAM Ecology wise between 1MB to 128MB RAM (But should inform client in print of options); I cannot really imagine you would need more apart from complex commands (cleaning for example & robots)

Direct Displayport & HDMI Interface; With or without use of USB Protocol HUB..

Touch screen operation examples:

Can additionally Smart pick diagnostic process of operations or equipment placement & screw & nut & bolting operations & welding or cutting!

For example, the DPIC Protocol can interface & runtime check Operations, Rotations, Motions & activations in well managed automatons; While directly interfacing the ARM/X64/RISC Processor tools & where necessary optimise memory & instruction ASM Runtime Kernel.

*

How does PTP Donation Compute work in business then:

Main JS Worker cache (couple of MB)

{ main . js }

{

{ Priority Static JS Files }

{ Priority Static Emotes & smilies (tiny) }

{ Priority Application JS & Static tiny lushi images (tiny) }

}
{

{ Work order sort task }

{ Sub tasks group }

{Compute Worker Thread }

}

*

(c)Rupert S

*****
Technology Demonstration https://is.gd/DongleTecDemo

Combining JIT PoCL with SiMD & Vector instruction optimisation we create a standard model of literally frame printed vectors :

VecSR that directly draws a frame to our display's highest floating point math & vector processor instructions; lowering data costs in visual presentation & printing.

(documents) JIT & OpenCL & Codec : https://is.gd/DisplaySourceCode

Include vector today *important* RS https://vesa.org/vesa-display-compression-codecs/

https://science.n-helix.com/2022/06/jit-compiler.html

https://science.n-helix.com/2022/08/jit-dongle.html

Bus Tec : https://drive.google.com/file/d/1M2ie8Jf_bNJaySNQZ5mqM1fD9SAUOQud/view?usp=sharing

https://science.n-helix.com/2022/04/vecsr.html

https://science.n-helix.com/2016/04/3d-desktop-virtualization.html

https://science.n-helix.com/2019/06/vulkan-stack.html

https://science.n-helix.com/2019/06/kernel.html

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2018/01/integer-floats-with-remainder-theory.html

https://science.n-helix.com/2022/08/simd.html

Sunday, August 14, 2022

SiMD Chiplet Fast compression & decompression (c)RS

SiMD Chiplet Fast compression & decompression (c)RS


*
Subject: SiMD Compression / Decompression chip of 2mm on side of die Chiplet (c)RS

Compression / Decompression chip of 2mm on side of die Chiplet (c)RS

Additional CPU & APU Compression / Decompression chip of 2mm to
feature on chiplet console APU's this is planned so that the Chiplet
does not require modification to the console APU,

Additionally to feature pin access Direct Discreet DMA for storage :

https://www.youtube.com/watch?v=1GvUdPn5QLg

*

Configuration of SiMD : Huffman & Compression : RS

To pack the majority of textures to 47 bit, one presumes a familiarity with Huffman codecs & the chaotic wavelets these present...

AVX256 Tasks x 4 = 64Bit
SiMD 16Bit x 2 = 32Bit / Alignment with AVX == x8
SiMD 32Bit x 2 = 64Bit / Alignment with AVX == x4

Closest to 47 = 40Bit Op x 2 (2.5Oe) | 80Bit/2 | 2 op x (1.5Oe)

So 40 Bit x2 parallel 6 Lanes

So on operation terms of precision :
32Bit Satisfies HDR,
40Bit Very much satisfies HDR,

16Bit satisfies JPG (basic)
64Bit satisfies LUT & Wide Gamut HDR Pro Rendering

*
Drill texture & image format (with contrast & depth enhancement)

https://drive.google.com/file/d/1G71Vd9d3wimVi8OkSk7Jkt6NtPB64PCG/view?usp=sharing
https://drive.google.com/file/d/1u2Qa7OVbSKIpwn24I7YDbwp2xdbjIOEo/view?usp=sharing

https://science.n-helix.com/2022/08/simd.html

Research topic RS : https://is.gd/Dot5CodecGPU https://is.gd/CodecDolby https://is.gd/CodecHDR_WCG https://is.gd/HPDigitalWavelet https://is.gd/DisplaySourceCode

*

GPU acceleration process : Huffman (c)RS


In the case of dictionary we create a cubic array: 16 parallel Integer cube, 32 SiMD,

FPU is used to compress the core elliptical curve with SVM Matrixing in 3D to 5D for files of 8Mb,FPU is inherently good versus Crystalline structure, We use the SiMD for comparative matrix & byte swap similarity.

It is always worth remembering that comparative operations are one of the most fundamental SiMD functions; But multiply, ADD & divide exist within SiMD,
Functional FPU code can always use arrays of SiMD to handle chaotic play in the field..

A main example is in Huffman's the variance of a wavelet from the main path,
Routes though main wavelet types are handled by table (on the amiga for example) &or FPU!
Micro changes make SiMD viable; In the same principle as a Hive & her ants.

Inherent expansion doubles the expected SiMD use; Ideally 2MB ram per cube
Taking advantage of a known quantity & precision we code-block by 16Bit to 128Bit segments.

Self correction allows us to Cube Huffman Decode into blocks, we parallelize blocks,
To (additionally) handle error we block the original compression.

"We also use fine-grained locking for the frequency dictionary, individually locking each key-value pair. Once the symbol codes have been determined, each symbol is replaced by its code, and all symbols; So are processed in parallel.

Decompression is inherently sequential, and hence much harder to parallelize. In this case, we take advantage of the self-synchronizing property of Huffman coding, which allows us to start at an arbitrary point"
Huffman source, Requires analysis https://github.com/catid/Zpng

https://vignan.ac.in/pgr20/20ES011.pdf
https://bestofgithub.com/repo/Better-lossless-compression-than-PNG-with-a-simpler-algorithm

ZPNG
faster than PNG and compresses better for photographic images. This compressor often takes less than 6% of the time of a PNG compressor
https://github.com/catid/Zpng
*

SiMD Chiplet Fast compression & decompression (c)RS


3 proposals


https://is.gd/BTSource

LZ77:
https://github.com/jearmoo/parallel-data-compression

The FastPFOR C++ library : Fast integer compression :
https://github.com/lemire/FastPFor

SIMDCompressionAndIntersection
C/C++ library for fast compression and intersection of lists of sorted integers using SIMD instructions : https://github.com/lemire/SIMDCompressionAndIntersection

Compressor Improvements and LZSSE2 vs LZSSE8
http://conorstokes.github.io/compression/2016/02/24/compressor-improvements-and-lzsse2-vs-lzsse8
http://conorstokes.github.io/compression/2016/02/15/an-LZ-codec-designed-for-SSE-decompression

Compression Science Docs


A General SIMD-based Approach to Accelerating Compression
Algorithms
https://arxiv.org/ftp/arxiv/papers/1502/1502.01916.pdf

SIMD Compression and the Intersection of Sorted Integers
http://boytsov.info/pubs/simdcompressionarxiv.pdf

Fast Integer Compression using SIMD Instructions
https://www.uni-mannheim.de/media/Einrichtungen/dws/Files_People/Profs/rgemulla/publications/schlegel10compression.pdf

Fast integer compression using SIMD instructions
https://www.researchgate.net/publication/220706907_Fast_integer_compression_using_SIMD_instructions

*****

The FastPFOR C++ library : Fast integer compression
Build Status Build Status Ubuntu-CI


https://jearmoo.github.io/parallel-data-compression/

GO

https://github.com/zentures/encoding

http://zhen.org/blog/benchmarking-integer-compression-in-go/

https://github.com/golang/snappy

The FastPFOR C++ library : Fast integer compression
Build Status Build Status Ubuntu-CI

What is this?

A research library with integer compression schemes. It is broadly applicable to the compression of arrays of 32-bit integers where most integers are small. The library seeks to exploit SIMD instructions (SSE) whenever possible.

This library can decode at least 4 billions of compressed integers per second on most desktop or laptop processors. That is, it can decompress data at a rate of 15 GB/s. This is significantly faster than generic codecs like gzip, LZO, Snappy or LZ4.

https://github.com/lemire/FastPFor

https://github.com/lemire/FastPFor/archive/refs/tags/v0.1.8.zip

https://github.com/lemire/FastPFor/archive/refs/tags/v0.1.8.tar.gz

Java May have a use in JS ôo
https://github.com/lemire/JavaFastPFOR

https://github.com/lemire/JavaFastPFOR/blob/master/benchmarkresults/benchmarkresults_icore7_10may2013.txt

*****

SIMDCompressionAndIntersection


C/C++ library for fast compression and intersection of lists of sorted integers using SIMD instructions : https://github.com/lemire/SIMDCompressionAndIntersection

SIMDCompressionAndIntersection
Build Status Code Quality: Cpp

As the name suggests, this is a C/C++ library for fast compression and intersection of lists of sorted integers using SIMD instructions. The library focuses on innovative techniques and very fast schemes, with particular attention to differential coding. It introduces new SIMD intersections schemes such as SIMD Galloping.

This library can decode at least 4 billions of compressed integers per second on most desktop or laptop processors. That is, it can decompress data at a rate of 15 GB/s. This is significantly faster than generic codecs like gzip, LZO, Snappy or LZ4.

*****LZ77*****

Principally an order & load+Vec https://github.com/jearmoo/parallel-data-compression

https://jearmoo.github.io/parallel-data-compression/


Summary of What We Completed

We have written and optimized the sequential version of the Huffman encoding and decoding algorithms, and tested it. For the parallel CPU version of this, we were debating between SIMD intrinsics and ISPC, and OpenMP.

However, Huffman coding compression and decompression doesn’t seem to have a workload that can appropriately use SIMD. This is because there is no elegant way of dealing with bits instead of bytes in SIMD. Moreover, different bytes compress to a different number of bits (there is no fixed mapping of input vector size to output vector size), which makes byte alignment in SIMD very difficult (for example, the compressed form for a random 4 byte input could range from 2 to 4 bytes). This is much worse for decompression, where resolving bit-level conflicts (where a specific encoding spreads over 2 bytes) is almost impossible and might actually result in the algorithm being slower than the sequential version. Therefore, we decided to focus on OpenMP.

For compression, we first sort the array in parallel, to minimize number of concurrent updates to the shared frequency dictionary, reducing contention and false sharing. We also use fine-grained locking for the frequency dictionary, individually locking each key-value pair. Once the symbol codes have been determined, each symbol is replaced by its code, and all symbols are so processed in parallel.

Decompression is inherently sequential, and hence much harder to parallelize. In this case, we take advantage of the self-synchronizing property of Huffman coding, which allows us to start at an arbitrary point in the encoded bits, and assume that at some point, the offset in bits will correct itself, resulting in the correct output thereafter.

We read about the LZ77 algorithm and explored the different variants of the algorithm. We also explored different ways to parallelize LZ77. One naive approach is running the LZ77 algorithm along different segments of the data. This approach could output the same result as the sequential implementation if we use a fixed size sliding window and reread over some of the data. Another approach is the one outlined in Practical Parallel Lempel-Ziv Factorization which uses an unbounded sliding window and employs the use of prefix sums and segment trees to calculate the Lempel-Ziv factorization in parallel.

Update on Deliverables

Our sequential implementations are close to finished, and we have some idea of how to parallelize the algorithms. Our goal for the checkpoint was to have both of these parts finished, but we have not completely met the goal. We may pivot and work on parallelizing the compression and decompression of the Huffman coding algorithm and drop the LZ77 part of the project altogether.

Our new goals:

Parallelize the Huffman Coding compression.
Parallelize the Huffman Coding decompression or LZ77 compression

Hope to achieve:
Both parts of part 2 in our new goals.

*****ZPNG


Huffman source, Requires analysis https://github.com/catid/Zpng

Small experimental lossless photographic image compression library with a C API and command-line interface.

It's much faster than PNG and compresses better for photographic images. This compressor often takes less than 6% of the time of a PNG compressor and produces a file that is 66% of the size. It was written in just 500 lines of C code thanks to Facebook's Zstd library.

The goal was to see if I could create a better lossless compressor than PNG in just one evening (a few hours) using Zstd and some past experience writing my GCIF library. Zstd is magical.

I'm not expecting anyone else to use this, but feel free if you need some fast compression in just a few hundred lines of C code.

**************************

Main interpolation references:


Interpolation https://drive.google.com/file/d/1dn0mdYIHsbMsBaqVRIfFkZXJ4xcW_MOA/view?usp=sharing

ICC & FRC https://drive.google.com/file/d/1vKZ5Vvuyaty5XiDQvc6LeSq6n1O3xsDl/view?usp=sharing

FRC Calibration >

FRC_FCPrP(tm):RS (Reference)

https://drive.google.com/file/d/1hEU6D2nv03r3O_C-ZKR_kv6NBxcg1ddR/view?usp=sharing

FRC & AA & Super Sampling (Reference)

https://drive.google.com/file/d/1AMR0-ftMQIIC2ONnPc_gTLN31zy-YX4d/view?usp=sharing

Audio 3D Calibration

https://drive.google.com/file/d/1-wz4VFZGP5Z-1lG0bEe1G2MRTXYIecNh/view?usp=sharing

2: We use a reference pallet to get the best out of our LED; Such a reference pallet is:

Rec709 Profile in effect : use today! https://is.gd/ColourGrading

Rec709 <> Rec2020 ICC 4 Million Reference Colour Profile : https://drive.google.com/file/d/1sqTm9zuY89sp14Q36sTS2hySll40DilB/view?usp=sharing

For Broadcasting, TV, Monitor & Camera https://is.gd/ICC_Rec2020_709

ICC Colour Profiles for compatibility: https://drive.google.com/file/d/1sqTm9zuY89sp14Q36sTS2hySll40DilB/view?usp=sharing

https://is.gd/BTSource

Colour Profile Professionally

https://displayhdr.org/guide/
https://www.microsoft.com/store/apps/9NN1GPN70NF3

*Files*

This one will suite Dedicated ARM Machine in body armour 'mental state' ARM Router & TV https://drive.google.com/file/d/102pycYOFpkD1Vqj_N910vennxxIzFh_f/view?usp=sharing

Android & Linux ARM Processor configurations; routers & TV's upgrade files, Update & improve
https://drive.google.com/file/d/1JV7PaTPUmikzqgMIfNRXr4UkF2X9iZoq/

Providence: https://www.virustotal.com/gui/file/0c999ccda99be1c9535ad72c38dc1947d014966e699d7a259c67f4df56ec4b92/
https://www.virustotal.com/gui/file/ff97d7da6a89d39f7c6c3711e0271f282127c75174977439a33d44a03d4d6c8e/

Python Deep Learning: configurations

AndroLinuxML : https://drive.google.com/file/d/1N92h-nHnzO5Vfq1rcJhkF952aZ1PPZGB/view?usp=sharing

Linux : https://drive.google.com/file/d/1u64mj6vqWwq3hLfgt0rHis1Bvdx_o3vL/view?usp=sharing

Windows : https://drive.google.com/file/d/1dVJHPx9kdXxCg5272fPvnpgY8UtIq57p/view?usp=sharing

Friday, June 10, 2022

JIT Compiler

Driver & Firmware Integrated JIT Compiler (c)RS

Driver & Firmware Integrated JIT Compiler - DPIC Display Protocol Indirect Compute 2022

Presenting JIT for hardware interoperability & function : https://is.gd/DisplaySourceCode

Integrated JIT Compiler directly into a Shader & OpenCL / Direct Compute Driver Ethernet Protocol Socket & IP

To & from all devices though Firmware Central JIT Compute Compiler

Computation tasks can be carried out by all installed Hardware & USB / Plugged devices:

WebGPU
Python
JavaScript
WebCL, OpenCL & Direct Compute
JIT compiled maths

Indirect Computation such as maths in Application : WebGPU, WebCL, OpenCL & Direct Compute.

Utilising Computation is as simple as having a V8 WebGPU function available,

May be directly available from the GPU without accessing the CPU if SDK is directly supported in GPU RAM...

So in the case of a TV BlueRay Player as an example; We may infact simply be able to integrate..

HTTPS: WebGPU, WebCL, OpenCL & Direct Compute & Methods such as JIT compiled maths.

The plan we use is to; Integrate JIT Compiler directly into a Shader & OpenCL / Direct Compute Driver Ethernet Protocol Socket & IP

Computation tasks can be carried out by all installed Hardware & USB / Pluged devices,

To & from all devices though Firmware Central JIT Compute Compiler

*

Kernel Method requires around 20Kb + Cache Kernel run on OpenCL &or Direct Compute,
Closest device runtime &or Operation infrastructure procedure call.

In the case examples:

Camera focus OpenCL Kernel Ofload
(Edge detect, No image : edges & 4pixels with gradient with jpg compression)

Audio device with buffers OpenCL Kernel Ofload
(processing input is from CPU to Audio Device : Simple Objective Pre Processing case)

SSD & HDD Firmware OpenCL Kernel Ofload
(Location & Write & Math proof of safe write &or read, Error correction)

Printer OpenCL Kernel Ofload
In the case of the printer the postscript driver "Is NOT" installed in your router,
The router prints but has basic drivers,

OpenCL Kernel Ofload (from printer),
Makes the task of processing a Postscript Font & Curl Angle print; Easy!

If you have a USB Hub with processor,
The Postscript Instruction Set is processed as OpenCL Vector Print

*

DPIC Device Protocol Indirect Compute Hub

Proposed HDMI/DisplayPort Hub (also GPU Processed)
Proposed USB Hub,
Proposed Bluetooth Hub,
Proposed WiFi Hub
Proposed Ethernet/Net Hub

with
50Mhz to 800Mhz processor with Dynamic Eco settings
*

On the aspect of HDMI & DisplayPort HTTP Ethernet protocol - DPIC Display Protocol Indirect Compute 2022 (c)RS https://bit.ly/VESA_BT

On the aspect of HDMI & DisplayPort HTTP Ethernet protocol; Several forms of Computation exist as possible for the equipment involved : Televisions, Monitors & GPU & CPU

*

(c)Rupert S https://bit.ly/VESA_BT

Research topic RS : https://is.gd/Dot5CodecGPU https://is.gd/CodecDolby https://is.gd/CodecHDR_WCG https://is.gd/HPDigitalWavelet https://is.gd/DisplaySourceCode

*

Example : JIT Optimise Dynamic code - DPIC Device Protocol Indirect Compute

Audio/Video/GPU/CPU/Urt/USB/BT : hardware to slow or fast? trade Processor Resources : How? DCP:JIT

Camera Focusing API for Web : Application,
Because Computers surely focus a camera better if we use DPIC : Device Compute
Processing JIT Compiler,
Then Latency is not the issue!

Video & Audio can do with additional processing : How? DCP:JIT

Monitor would be able to do so much more! With additional processing : How? DCP:JIT

Kernel Method requires around 20Kb + Cache Kernel run on OpenCL &or Direct Compute,
Closest device runtime &or Operation infrastructure procedure call.

Tier processing; Objectives:

High quality process,
Performance,
Shared workload,
Appropriate Computing unit

In the case examples:

Camera focus OpenCL Kernel Ofload
(Edge detect, No image : edges & 4pixels with gradient with jpg compression)

Audio device with buffers OpenCL Kernel Offload
(processing input is from CPU to Audio Device : Simple Objective Pre Processing case)

SSD & HDD Firmware OpenCL Kernel Offload
(Location & Write & Math proof of safe write &or read, Error correction)

Printer OpenCL Kernel Offload
In the case of the printer the postscript driver "Is NOT" installed in your router,
The router prints but has basic drivers,

OpenCL Kernel Offload (from printer) > (from USBHub : Some) > (Router back to printer),
In an ideal situation the Kernel processes the next tier up; In this case Pro-USBHub;
Leaving the router process free but with a very high quality printing job done.

Makes the task of processing a Postscript Font & Curl Angle print; Easy!

If you have a USB Hub with processor,
The Postscript Instruction Set is processed as OpenCL Vector Print

*
DPIC Device Protocol Indirect Compute Hub

Proposed HDMI/DisplayPort Hub (also GPU Processed)
Proposed USB Hub,
Proposed Bluetooth Hub,
Proposed Wifi Hub
Proposed Ethernet/Net Hub

with
50Mhz to 800Mhz processor with Dynamic Eco settings
*

Inter-device JIT Compiler Kernels (c)RS


JIT Compiler : Driver facing the Monitor is included with JIT Compiler Firmware
subjectively...

For the JIT Compiler to be available add the JIT Compiler to the HDMI
& Displayport Driver,

Facing from the Monitor/AUDIO/VIDEO/BUSS/URT <>
GPU <> CPU

USB & Bluetooth require both the USB, Dongle adapter <> BUSS/URT <> CPU/GPU...
To further connect Printers & other devices...

Under the same principle the Lens of a camera operating under the mounting fixture requires a fast connection,
In order to utilize Infrared/UV/Laser & Light or DIODE Controlled fixtures that require special firmware downloaded kernels,

These kernels are flexible & will speed up devices & assure top performance with:

16Bit, 32Bit, 64Bit & Float Kernels

Driving the monitor & Learning sharper graphics

https://is.gd/BTSource


Firstly, we need an OpenCL Kernel : PocCL :

PoCL Source & Code
https://is.gd/LEDSource

MS-OpenCL
https://is.gd/MS_OpenCL

*

Code/JS/OpenCL/Machine Learning Processing Block Size Streamlining (c)RS


Dataset AV1/VP9/MPEG/H265/H264 : case example
My personal observation is that decompression & compression performance relates to block size & cache

SiMD 8xBlock x 8xBlock Cube : 32Bit | x 4 128Bit | x 8 256Bit | x 16 512Bit
Cache Size : 32Kb Code : Code has to be smaller inline than 32Kb! Can loop 4Kb x 14-1 for main code segment

Cache Size 64Kb Data : Read blocks & predicts need to streamline into 64Kb blocks in total,
4Kb Optimized Code Cache
4Kb Predict (across block for L2 Multidirectional)
16Bit Colour Compressed block 4x16Bit (work cache compressed : 54Kb
Lab Colour ICC L2 & block flow L2

https://science.n-helix.com/2022/09/ovccans.html

*

Combining JIT PoCL with SiMD & Vector instruction optimisation we create a standard model of literally frame printed vectors :

VecSR that directly draws a frame to our display's highest floating point math & vector processor instructions; lowering data costs in visual presentation & printing.

(documents) JIT & OpenCL & Codec : https://is.gd/DisplaySourceCode

Include vector today *important* RS https://vesa.org/vesa-display-compression-codecs/

https://science.n-helix.com/2022/06/jit-compiler.html

https://science.n-helix.com/2022/04/vecsr.html

https://science.n-helix.com/2016/04/3d-desktop-virtualization.html

https://science.n-helix.com/2019/06/vulkan-stack.html

https://science.n-helix.com/2019/06/kernel.html

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2018/01/integer-floats-with-remainder-theory.html

https://science.n-helix.com/2022/08/simd.html

Friday, April 1, 2022

VecSR - Vector Standard Render

VecSR - Vector Standard Render


VESA Standards : Vector Graphics, Boxes, Ellipses, Curves & Fonts : Consolas & other brilliant fonts : (c)RS

Vector Compression VESA Standard Display protocol 3 : RS

SiMD Render - Vector Graphics, Boxes, Ellipses, Curves & Fonts

*
32Bit SiMD Operations Available on AVX Per Cycle (A Thought on why 32Bit operations are good!)
(8Cores)8*32Bit SiMD(AVX) * 6(times per cycle) * 3600Mhz = 1,382,400 Operations Per Second

Security Relevant Extensions
SVM : Elliptic Curves & Polynomial graphs & function
AES : Advanced Encryption Standard Functions
AVX : 32Bit to 256Bit parallel Vector Mathematics
FPU : IEEE Float Maths
F16b : 16Bit to 32Bit Standards Floats
RDTSCP : Very high precision time & stamp

Processor features: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 htt pni ssse3 fma cx16 sse4_1 sse4_2 popcnt aes f16c syscall nx lm avx svm sse4a osvw ibs xop skinit wdt lwp fma4 tce tbm topx page1gb rdtscp bmi1

Photos & Performance https://is.gd/4447GamerWEBB


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OT-SVG Fonts & TT-SVG Obviously Rendered in Direct X 9+ & OpenGL 3+ Mode & Desktop Rendering modes


Improve Console & TV & BIOS & General Animated Render

Vector Compression VESA Standard Display protocol 3 : RS

SiMD Render - Vector Graphics, Boxes, Ellipses, Curves & Fonts
Improve Console & TV & BIOS & General Animated Render

Vector Display Standards with low relative CPU Weight
SiMD Polygon Font Method Render

Default option point scaling (the space) : Metadata Vector Fonts with Curl mathematical vector :

16 Bit : SiMD 1 width
32 Bit : SiMD Double Width

High precision for AVX 32Bit to 256Bit width precision.

Vectoring with SiMD allows traditional CPU mastered VESA Emulation desktops & safe mode to be super fast & displays to conform to VESA render standards with little effort & a 1MB Table ROM.

Though the VESA & HDMI & DisplayPort standards Facilitates direct low bandwidth transport of and transformation of 3D & 2D graphics & fonts into directly Rendered Super High Fidelity SiMD & AVX Rendering Vector

Display Standards Vector Render : DSVR-SiMD Can and will be directly rendered to a Surface for visual element : SfVE-Vec

As such transport of Vectors & transformation onto display (Monitor, 3D Unit, Render, TV, & Though HDMI, PCI Port & DP & RAM)

Directly resolve The total graphics pipeline into high quality output or input & allow communication of almost infinite Floating point values for all rendered 3D & 2D Elements on a given surface (RAM Render Page or Surface)

In high precision that is almost unbeatable & yet consumes many levels less RAM & Transport Protocol bandwidth,

Furthermore can also render Vector 3D & 2D Audio & other elements though Vector 'Fonting' Systems, Examples exist : 3D Wave Tables, Harmonic reproduction units for example Yamaha and Casio keyboards.

RGBA Composite Layer X-OR


RGBA Can simply be the shape printed onto alpha layer; Wide Transparency effect.
RGB-Supposition is X-OR Shape on mapping block or cube or curve & shape; Due to Alpha Alias smooth blending is achieved.

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Furthermore can also render Vector 3D & 2D Audio & other elements though Vector 'Fonting' Systems, Examples exist : 3D Wave Tables, Harmonic reproduction units for example Yamaha and Casio keyboards.

Personally QFT is a much more pleasurable experience than VRR at 2xFPS+
Stable FPS & X-OR Partial Frame Retention saving on compression.

"QFT a Zero compression or low level compression version of DSC
1.2bc

X-OR Frame Buffer Compression & Blank Space Compression:
Vector Compression VESA Standard Display protocol 3"

"QFT transports each frame at a higher rate to decrease “display
latency”, which is the amount of time between a frame being ready for
transport in the GPU and that frame being completely displayed. This
latency is the sum of the transport time through the source’s output
circuits, the transport time across the interface, the processing of
the video data in the display, and the painting of the screen with the
new data. This overall latency affects the responsiveness of games:
how long it appears between a button is pressed to the time at which
the resultant action is observed on the screen.

While there are a lot of variables in this equation, not many are
adjustable from an HDMI specification perspective. QFT operates on the
transport portion of this equation by reducing the time it takes to
send only the active video across the cable. This results in reduced
display latency and increased responsiveness."

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(c)Rupert S

Drawing tools & functions that are the basis of our draw frame & font functions : Polygon maths


Core Processor features : SVM, SiMD, FPU
Core tools : https://science.n-helix.com/2019/06/vulkan-stack.html

Reference material for Drawing Elliptoids, Curves & Polygons

SVM Elliptic Curve magic:
Fractal maths for improved efficiency & Combustion energy, Regard the photos & the FX8320E for details

Effective Application of SVM Processor Elliptic Maths
https://is.gd/SVMefficiency

Linear Bounding Volume Hierarchy &
Elliptic Bounding Volume Hierarchy for SVM Processor Feature:
SVM Can be emulated in SiMD pure 32Bit Single or 64Bit Double Precision,
& is for high complexity rendering such as non regular windows.

https://www.phoronix.com/scan.php?page=news_item&px=RADV-LBVH-Lands

SVM Can be emulated in SiMD pure 32Bit Single or 64Bit Double Precision..
Is useful for creating non Circle curves such as elliptoids & oblong wave boxes.

In VSR & VSR Variable Lighting we can define spaces with eliptoids SVM,
Therefore shape around trees & grasses & animals &or people & Whales.

https://www.youtube.com/watch?v=UojqzrPtR70

(c)RS

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FFT or QFFT : Fast Fourier Transform


FFT or QFFT is not only about audio; But also Video & 3D, Mouse & input/output devices (c)RS 2022

FFT or QFFT is not only about audio; But also Video & 3D,
In fact FFT Fast Fourier Transforms are about any device such as a mouse that directly interacts with Waves,

Such a device is the laser mouse & pointer; The primary reason is to use Noise reduction & path smoothing,
Primarily to create a 16Bit to 256Bit pure float with high compression or pack bit properties.

Creating Sine-oidial curves & waves or SiMD, Float & packed integer/Float operations saves on bandwidth & increases messaging speed therefore!

Both the input & output from Bluetooth, 2.4G & USB & Serial can in fact be reduced to mapped Curves & angles; While this introduces a small error factor & this is a factor that producers & driver developers need to work out & create error margins for.

Creation & development of Ultra high precision Input & output for Humans, Robots & precision pointers; Requires a precise production FFT & to account for the fact surrounding the interactive motion of point A to point B; & In fact point C...

Development continues & today's mission is to open minds about why we use FFT & noise reduction & Curve maps such as elliptic SVM & Bit Averaging Fast transforms for Center point Algebra & Math Tables & Graphs.

Further study includes Raytracing & All Haptic motion; Sensors & Car engine Mechanics.

(c)Rupert S

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Include vector today *important* RS https://vesa.org/vesa-display-compression-codecs/

https://science.n-helix.com/2016/04/3d-desktop-virtualization.html

https://science.n-helix.com/2019/06/vulkan-stack.html

https://science.n-helix.com/2019/06/kernel.html

https://science.n-helix.com/2022/03/fsr-focal-length.html

https://science.n-helix.com/2018/01/integer-floats-with-remainder-theory.html

https://bit.ly/VESA_BT

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Core Concepts of Direct Vector Render Frame Buffers & Cache


LHP_DSC_Xor : Screen Fast Buffer Access


VESA Standard Ethernet Standard Frame Protocol for QFT, VRR & Low Latency High Performance Dynamic Compression XOR Frame Refresh : LLHP_DSCX : LHP_DSC_Xor

QFT & VRR basically allow the TV to float a resolution refresh free from Frame Cache Memory Refresh (Refueling the Cache Buffer) ,
Basically the frame can be fetched from the Frame Cache (4MB to 64MB) Without interacting with the CPU

This means a Fast Direct DMA Cache pull on frame to Screen & does not demand that the CPU need to perform this fast; Additionally the Frame comes without tearing or Frame pulls from the HDMI or display port VESA Ethernet Standard Frame Protocol.

Rupert S

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Predicted Content Compression Frame Negotiation (c)RS


Compression for HDMI & DP : VRR & QFT with frame content prediction & Minimal Adjust; X-OR Content replacement

Compression Implicitly supported : STC, DXT, EAC & ATSC & DSC , Most of these compression forms are available in ARM, AMD, NVidia & Intel Hardware & therefore directly supported by us in creating the best frames & video; HDR WCG RGBA/X 4 Channel.

Compression required for a display; Common details include using Compression as a last desperate measure to improve bandwidth for displays on High Definitions such as 4K on HDMI 2!

My personal strategy is to implement compression that is transparent; Starting right at almost non,

Frequently the problem with VRR & QFT is that a frame is sent or not sent...

By utilizing Prediction in compression we force the prediction of an exact copy of present data,
We adjust the frame with X-OR & modify only a few details; Therefore we do not need to send a lot of data & can send more frames!

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Vector Compression VESA Standard Display protocol 3 +

DSC : Zero compression or low level compression version of DSC
1.2bc

Frame by Frame compression with vector prediction.

Personally, QFT is a much more pleasurable experience than VRR at 2xFPS+
Stable FPS & X-OR Partial Frame Retention saving on compression.

X-OR Frame Buffer Compression & Blank Space Compression:

X-OR X=1 New Data & X=0 being not sent,
Therefore Masking the frame buffer,

A Frame buffer needs a cleared aria; A curve or ellipsoid for example,
Draw the ellipsoid; This is the mask & can be in 3 levels:

X-OR : Draw or not Draw Aria : Blitter XOR
AND : Draw 1 Value & The other : Blitter Additive
Variable Value Resistor : Draw 1 Value +- The other : Blitter + or - Modifier

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PCCFN


The idea Behind PCCFN is to modify the frame by a smaller amount with low bandwidth & thereby increase frame rate by the following method:

DSC Compression is used & Predict is enabled..
Predict is used to redisplay the frame on the screen; With no data needing to be sent : X-OR..
However Modifications are made to the frame by overruling parts of the Static frame with data..

The effect is that only parts of the frame (Vector Motion Prediction); Are sent,

Both bandwidth & speed are preserved & the same effect works from BFrames & Partial Full Frames.

https://hdmi.org/spec21sub/variablerefreshrate
https://hdmi.org/spec21sub/quickframetransport

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ITS_DHDR_VRR : Gaming & Desktop : HDR, Source-Based Tone Mapping (SBTM)

High Efficiency DSC Screen Dynamic Shift State Screen blanking Replacement
Low Bandwidth Requirement for 40Hz to 240Hz+

HDR, HDMI & Display-port Standards VESA 2022 : Independent Thread
Asymmetric Compute Frame Buffer Tree for HDR, Display & Compression
DSC : RS (c)Rupert S

Composer Frame DSC is where we Compose a frame in the renderer, That
frame is for example the window task bar & another box for the
Explorer frame; The example is not OS Exclusive; Is an example.

We implement DSC Display compression in the frame (smaller than the
display resolution or super sampled),

Every piece of content in the Main Render Frame to HDMI & Display port
is computed independently with static content not being adjusted or
recompressed until needed,

Our goal is to place Every frame or window in a Sub-Buffer Cache & Render to the main Frame Cache/Buffer,

On completion of the frame at whatever FPS Refresh we desire for the Main Frame Buffer,
Effectively we Blitter &or Byte-swap our Window Frame Buffer to a location within the Main Frame buffer,

The location of our window & our localised processing mean that content of each window & therefore process is independently proven to be the Same as the frame before (We X-OR),

Therefore we Frame Predict (DSC) That a small portion of the main frame buffer has the same data,
We do not need to change a thing & so we do not need to utilize the processor to render it..

However if data has changed; Then the change is localised to a single small render space in the main frame buffer & we therefore can refresh the screen faster & Frame Prediction (Like JPG & MPEG)

Proves that we only need to inform the Screen (HDMI & DP Signal in our case);
That no additional date is sent; However any changes to the main frame buffer such as main view or video or text files or HTML Refresh will be Sent & Rendered,
Without Latency issues or large amounts of data being sent though the Cable..

But we still render faster than recompressing a main frame buffer completely & in addition change what we wish per thread without the resulting processing Hanging or waiting on Data To arrive from a baton-pass.

Our reasoning is that each frame is independent; Therefore we compose
in GPU or CPU & independently Compress the Frame within adjusted
context of the HDMI & DisplayPort,

3 Frame Buffer; We can optimise the whole frame with Prediction
Compression if we wish,

The Main goal : Independent Thread Render for Sub-Framing High Dynamic
Range with Independent Application Variable Refresh Rate :
ITS_DHDR_VRR.

The main advantages are : Task bar is Low CPU Resource use but high
refresh rate; low data modification rate over a tiny area of the task
bar,

The Game Window & the Frame (Mostly Square) are drawn with sub-pixel
precision on location..
But the frame that barely changes does not need recompression in DSC..

The Game window does not need to compute or adjust content Compression
for the frame...

Every piece of content in the Main Render Frame to HDMI & Display port
is computed independently with static content not being adjusted or
recompressed until needed.

This works with the HDR, HDMI & Display-port Standards VESA

(c)Rupert S


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*Application of SiMD Polygon Font Method Render

*3D Render method with Console input DEMO : RS

3D Display access to correct display of fonts at angles in games & apps without Utilizing 3rd Axis maths on a simple Shape polygon Vector font or shape. (c)Rupert S

3rd dimensional access with vector fonts by a simple method:

Render text to virtual screen layer AKA a fully rendered monochrome, 2 colour or multi colour..

Bitmap/Texture,

Due to latency we have 3 frames ahead to render to bitmap DPT 3 / Dot 5

Can be higher resolution & we can sub sample with closer view priority...

We then rotate the texture on our output polygon & factor size differential.

The maths is simple enough to implement in games on an SSE configured Celeron D (depending on resolution and Bilinear filter & resize

Why ? Because rotating a polygon is harder than subtracting or adding width, Hight & direction to fully complex polygon Fonts & Polygon lines or curves...

The maths is simple enough to implement in games on an SSE configured Celeron D (depending on resolution and Bilinear filter & resize.

Such an example is my SiMD & MMX > AVX Image resizer,
Mipmapping fonts does tend to require over sized fonts..
For example Size 8 & 9 font output = Size 10 to 14 Font,

TT-SVG & Open Fonts OT-SVG & Bitmap fonts compress well;
Mipmapped from 3 sizes larger & Cached as a DOT3/5 or NV12...
You have to save a cache; The Cache can be:

Emulated or Dynamic Spacing (for difficult SETSPACE Console Font situations)
2 Tone, Grey, RGB, RGBA_8888, RGBA_1010102, RGBA_F16, P010, 444A, 888A or 101010A &
(DSC Precached Predicted Block Compression)tm

The representation with alpha is mainly for smoothing & clean lines & is very quick to draw.

Therefore we can Cache a Bitmap Version of any font,
We can of course Vector Render A font & directly to compressed surface rendering.

The full process leads up to the terminal & how to optimize CON,
We can & will need to exceed capacities of any system & To improve them!

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DSC Precached Predicted Block Compression


We have a font for example with Alpha stored in the screen buffer & of a set size for BLITTING on top of a colour or image background,

The alpha prevents the transposed X-OR Image or Font from having noise & creates ..a smooth sharp in-place modification of content.

For our purpose X-OR can use Alpha instead of a single colour because this allows a very delicate smooth presentation on top of the background..

Repeated application (& Probably Saving of, To save Resource usage); Can overlay graphic of Font Content.

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VecSR is really good for secondary loading of sprites & text; In these terms very good for pre loading on for example the X86, RISC, AMIGA & Famicom type devices,With appropriate loading into Sprite buffers or Emulated Secondaries (Special Animations) or Font Buffers.

Font Drawing & Vector Render

Although Large TT-SVG & OT-SVG fonts load well in 8MB Ram on the Amiga with Integer & Emulated Float (Library); Traditional Bitmap fonts work well in a Set Size & can resize well if cached & Interpolated &or Bilinear Anti-Alias & sharpened a tiny bit!

presenting: Dev-Con-VectorE²
Fast/dev/CON 3DText & Audio Almost any CPU & GPU ''SiMD & Float/int"
Class VESA Console +

With Console in VecSR you can 3DText & Audio,

VecSR Firmware update 2022 For immediate implementation in all
operating systems & ROM's

Potential is fast & useful.

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I will put this in print, My 3D & 2D Vector SiMD standard is the thing that i believe will save the most bandwidth on HDMI & DisplayPort Cables & Enable Vector 3D such as Laser Printers & Laser Screens, At the end of the day WE NEED VECTORS : RS
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https://science.n-helix.com/2022/04/vecsr.html

https://is.gd/Dot5CodecGPU

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Camera & HDMI & DP Compression Modes


Camera Modes
4:2:1 , 4:2:2 for the 4K Camera : HDR
4:4:4 for the faster 4K Camera : HDR
4:2:1 , 4:2:2 for the faster 8K Camera : HDR

TV Modes

HDMI 1.4 | 4:2:1 , 4:2:2 , 8bit, 10Bit for HD to HD+
HDMI 2 | 4:2:2 , 10Bit, 12Bit HDR 4K
HDMI 2.1 | 4:2:2, 10Bit, 12Bit, 16Bit 4K to 6K/8K..

Example : 5120x2880x 60000Khz-GPixClock-DataRate GRefreshRate-38.365Hz-DBLScan 4:2:2 12Bit

If we had DSC compression modes installed in firmware ...

BEST MODE : Can we upgrade this dynamically to HDMI 2.1 Standards with firmware & DSC Installed

Question is can we implement BEST MODE for our Quality range & Also utilize DSC & Alternative Texture Mode Compression & Dynamic MAX Speed

Yes We Can RS : DSC, ETC, ASTC & DTX Compression for display frames

Yes for Studio recording 4:2:2 mode offers 2x the resolution & 4 extra Bit for the same money as 4:4:4 : 4:2:2 10Bit, 12Bit, 14Bit, 16Bit : Higher Dynamic Contrast & Colour

Examples
https://youtu.be/VCdrB1b7wfc

https://youtu.be/NIsoSA8uO04
https://youtu.be/Suc0OV_9TiA

Render Folder https://bit.ly/VESA_BT

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ASTC, EAC, DXT, PVRTC & DSC with firmware updated & need to be
included in the standards & firmware.

YCoCg-R


https://en.wikipedia.org/wiki/YCoCg

The screen content coding extensions of the HEVC standard and the VVC standard include an adaptive color transform within the residual coding process that corresponds with switching the coding of RGB video into the YCoCg-R domain.

The use of YCoCg color space to encode RGB video in HEVC screen content coding found large coding gains for lossy video, but minimal gains when using YCoCg-R to losslessly encode video

Yes for Studio recording 4:2:2 mode offers 2x the resolution & 4 extra Bit for the same money as 4:4:4 : 4:2:2 10Bit, 12Bit, 14Bit, 16Bit : Higher Dynamic Contrast & Colour

HDMI 1.4 | 4:2:1 , 4:2:2 , 8bit, 10Bit for HD to HD+
HDMI 2 | 4:2:2 , 10Bit, 12Bit HDR 4K
HDMI 2.1 | 4:2:2, 10Bit, 12Bit, 16Bit 4K to 6K/8K..

Example : 5120x2880x 60000Khz-GPixClock-DataRate
GRefreshRate-38.365Hz-DBLScan 4:2:2 12Bit

https://www.cablematters.com/blog/DisplayPort/hdmi-2-1-vs-displayport-2-0

https://www.cablematters.com/blog/DisplayPort/what-is-display-stream-compression

https://en.wikipedia.org/wiki/YCoCg

https://is.gd/Dot5CodecGPU

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Things Task Shaders can (c)RS


https://www.phoronix.com/scan.php?page=news_item&px=AMD-RDNA3-More-5.19-Tasks-RADV

Task Shaders can be launched to implement Elliptic & Polygon MESH & thus create:

Things Task Shaders can implement though MESH Shading & Polygons:

(Direct Load of a preform MESH)

Multi-Threaded+
Tundra & fauna
Polygon Fonts
Video Rendering Polygon interpretative interpolation..
Polygon MESH Conceptualised Vector Audio.
X-OR DSC Blank space removal
Polygon math & viewer & Viewer Angle based dynamic MESH Subtraction & Addition..
Close loop Tessellation

OpenCL Group micro tasks
Direct Compute/DirectedCL Group micro tasks
Multi-Threading
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"Task shader is an optional stage that can run before a Mesh shader in a graphics pipeline. It's a compute-like stage whose primary output is the number of launched mesh shader workgroups (1 task shader workgroup can launch up to 2^22 mesh shader workgroups), and also has an optional payload output which is up to 16K bytes."